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author | Gabe Black <gblack@eecs.umich.edu> | 2006-10-02 14:32:02 -0400 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2006-10-02 14:32:02 -0400 |
commit | e8ced44aead3b1a11ac7747b8d38ce5dba6c09d1 (patch) | |
tree | 2453c596489fbe786e6da2e21e0b5791bcbeaf88 /src/sim/eventq.hh | |
parent | e62b734b23d03c50fcd31d833f417207e4520d29 (diff) | |
parent | f2acc3a4a303e4cc054eef62621499ebcbf8599b (diff) | |
download | gem5-e8ced44aead3b1a11ac7747b8d38ce5dba6c09d1.tar.xz |
Merge zizzer.eecs.umich.edu:/bk/newmem
into zeep.eecs.umich.edu:/home/gblack/m5/newmem
src/cpu/ozone/cpu_impl.hh:
Hand merged
--HG--
extra : convert_revision : f8a5b0205bcb78c8f5e109f456fe7bca80a7abac
Diffstat (limited to 'src/sim/eventq.hh')
-rw-r--r-- | src/sim/eventq.hh | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/sim/eventq.hh b/src/sim/eventq.hh index 430473df3..537bfb918 100644 --- a/src/sim/eventq.hh +++ b/src/sim/eventq.hh @@ -46,6 +46,7 @@ #include "sim/host.hh" // for Tick #include "base/fast_alloc.hh" +#include "base/misc.hh" #include "base/trace.hh" #include "sim/serialize.hh" @@ -135,7 +136,7 @@ class Event : public Serializable, public FastAlloc /// same cycle (after unscheduling the old CPU's tick event). /// The switch needs to come before any tick events to make /// sure we don't tick both CPUs in the same cycle. - CPU_Switch_Pri = 31, + CPU_Switch_Pri = -31, /// Serailization needs to occur before tick events also, so /// that a serialize/unserialize is identical to an on-line @@ -351,7 +352,8 @@ inline void Event::schedule(Tick t) { assert(!scheduled()); - assert(t >= curTick); +// if (t < curTick) +// warn("t is less than curTick, ensure you don't want cycles"); setFlags(Scheduled); #if TRACING_ON |