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| author | Daniel R. Carvalho <odanrc@yahoo.com.br> | 2018-04-16 15:36:33 +0200 |
|---|---|---|
| committer | Daniel Carvalho <odanrc@yahoo.com.br> | 2018-06-01 11:21:46 +0000 |
| commit | 7704113d94f2e574afeb079e0cc5b98fc6bed33b (patch) | |
| tree | 62f52772add95114e3a68f9eee39d0648439bca8 /src/sim/probe | |
| parent | 888bdb67e181710283372ae1a74698e216ee3ac2 (diff) | |
| download | gem5-7704113d94f2e574afeb079e0cc5b98fc6bed33b.tar.xz | |
mem-cache: Create an address aware TempCacheBlk
tempBlock has its member variables manually set in order to allow
it to be used in the block address regeneration function. This is
not necessary, and ti can be simply given the address, so it does
not need to be aware of set and tag. This will simplify
implementation of sector and skewed caches.
Change-Id: Iaffb10c323509722cd5589fe1030b818d43336d6
Reviewed-on: https://gem5-review.googlesource.com/9961
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Diffstat (limited to 'src/sim/probe')
0 files changed, 0 insertions, 0 deletions