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authorAlexandru Dutu <alexandru.dutu@amd.com>2014-11-23 18:01:08 -0800
committerAlexandru Dutu <alexandru.dutu@amd.com>2014-11-23 18:01:08 -0800
commitf743bdcb6994a4e0e413e1a3499f7424b5ec2efa (patch)
tree86f81f804d3a17f4c1b4530e040e144fcf21389b /src/sim/process.cc
parentadbaa4dfde96d5aaf84adf0ae4989ef880aad726 (diff)
downloadgem5-f743bdcb6994a4e0e413e1a3499f7424b5ec2efa.tar.xz
x86: Segment initialization to support KvmCPU in SE
This patch sets up low and high privilege code and data segments and places them in the following order: cs low, ds low, ds, cs, in the GDT. Additionally, a syscall and page fault handler for KvmCPU in SE mode are defined. The order of the segment selectors in GDT is required in this manner for interrupt handling to work properly. Segment initialization is done for all the thread contexts.
Diffstat (limited to 'src/sim/process.cc')
-rw-r--r--src/sim/process.cc1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/sim/process.cc b/src/sim/process.cc
index d1fb22029..f53c6b850 100644
--- a/src/sim/process.cc
+++ b/src/sim/process.cc
@@ -107,6 +107,7 @@ Process::Process(ProcessParams * params)
max_stack_size(params->max_stack_size),
M5_pid(system->allocatePID()),
useArchPT(params->useArchPT),
+ kvmInSE(params->kvmInSE),
pTable(useArchPT ?
static_cast<PageTableBase *>(new ArchPageTable(name(), M5_pid, system)) :
static_cast<PageTableBase *>(new FuncPageTable(name(), M5_pid)) ),