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| author | Lisa Hsu <hsul@eecs.umich.edu> | 2008-12-04 18:03:35 -0500 |
|---|---|---|
| committer | Lisa Hsu <hsul@eecs.umich.edu> | 2008-12-04 18:03:35 -0500 |
| commit | e2c7618e508c6e5c0cbbd091eabb336f3e259465 (patch) | |
| tree | b62bba786153422bcaffe32b285b9cb97ca23339 /src/sim/process.cc | |
| parent | 041ca19edc7ebd905b3fe3e1b731c0b19a146896 (diff) | |
| download | gem5-e2c7618e508c6e5c0cbbd091eabb336f3e259465.tar.xz | |
This patch pulls out the auxiliary vector struct from individual ISA
LiveProcesses to the base LiveProcess definition so anyone can use them.
Diffstat (limited to 'src/sim/process.cc')
| -rw-r--r-- | src/sim/process.cc | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/sim/process.cc b/src/sim/process.cc index dab374d84..73adc96e3 100644 --- a/src/sim/process.cc +++ b/src/sim/process.cc @@ -86,6 +86,16 @@ using namespace TheISA; // current number of allocated processes int num_processes = 0; +template<class IntType> +M5_auxv_t<IntType>::M5_auxv_t(IntType type, IntType val) +{ + a_type = TheISA::htog(type); + a_val = TheISA::htog(val); +} + +template class M5_auxv_t<uint32_t>; +template class M5_auxv_t<uint64_t>; + Process::Process(ProcessParams * params) : SimObject(params), system(params->system), checkpointRestored(false), max_stack_size(params->max_stack_size) |