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| author | Lisa Hsu <hsul@eecs.umich.edu> | 2008-12-05 12:11:46 -0500 |
|---|---|---|
| committer | Lisa Hsu <hsul@eecs.umich.edu> | 2008-12-05 12:11:46 -0500 |
| commit | 854aa60fdcec2a95d2c08844d62681b498281ca3 (patch) | |
| tree | 773ef7b3acb7d6b1da8628217a0441fab9c45af2 /src/sim/process.hh | |
| parent | d6b229ea0f46de3a622ebb1ef86cb526625ebc2e (diff) | |
| parent | f1430941cf17fc15a8b86eba41f9c856ad9347d8 (diff) | |
| download | gem5-854aa60fdcec2a95d2c08844d62681b498281ca3.tar.xz | |
Automated merge with ssh://m5sim.org//repo/m5
Diffstat (limited to 'src/sim/process.hh')
| -rw-r--r-- | src/sim/process.hh | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/src/sim/process.hh b/src/sim/process.hh index d6ed59ced..996663847 100644 --- a/src/sim/process.hh +++ b/src/sim/process.hh @@ -61,6 +61,22 @@ namespace TheISA class RemoteGDB; } +template<class IntType> +struct M5_auxv_t +{ + IntType a_type; + union { + IntType a_val; + IntType a_ptr; + IntType a_fcn; + }; + + M5_auxv_t() + {} + + M5_auxv_t(IntType type, IntType val); +}; + class Process : public SimObject { public: |