diff options
| author | Alexandru <alexandru.dutu@amd.com> | 2014-08-28 10:11:44 -0500 |
|---|---|---|
| committer | Alexandru <alexandru.dutu@amd.com> | 2014-08-28 10:11:44 -0500 |
| commit | 5efbb4442a0e8c653539e263bf87c48849280e23 (patch) | |
| tree | da6807c806ebb1f658692c5bf823156831134c9f /src/sim/process.hh | |
| parent | 26ac28dec288e4fd96d999267ec7cafad4d58c5a (diff) | |
| download | gem5-5efbb4442a0e8c653539e263bf87c48849280e23.tar.xz | |
mem: adding architectural page table support for SE mode
This patch enables the use of page tables that are stored in system memory
and respect x86 specification, in SE mode. It defines an architectural
page table for x86 as a MultiLevelPageTable class and puts a placeholder
class for other ISAs page tables, giving the possibility for future
implementation.
Diffstat (limited to 'src/sim/process.hh')
| -rw-r--r-- | src/sim/process.hh | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/sim/process.hh b/src/sim/process.hh index 361e07bca..03380acf7 100644 --- a/src/sim/process.hh +++ b/src/sim/process.hh @@ -125,6 +125,8 @@ class Process : public SimObject //separated. uint64_t M5_pid; + // flag for using architecture specific page table + bool useArchPT; PageTableBase* pTable; class FdMap |