cpu: dev: sim: gpu-compute: Banish some ISA specific register types.

These types are IntReg, FloatReg, FloatRegBits, and MiscReg. There are
some remaining types, specifically the vector registers and the CCReg.
I'm less familiar with these new types of registers, and so will look
at getting rid of them at some later time.

Change-Id: Ide8f76b15c531286f61427330053b44074b8ac9b
Reviewed-on: https://gem5-review.googlesource.com/c/13624
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

1 files changed, 4 insertions, 5 deletions

diff --git a/src/sim/process.hh b/src/sim/process.hh
index cb2a3e2be..c690e825e 100644
--- a/src/sim/process.hh
+++ b/src/sim/process.hh
@@ -73,10 +73,9 @@ class Process : public SimObject
     DrainState drain() override;
 
     virtual void syscall(int64_t callnum, ThreadContext *tc, Fault *fault);
-    virtual TheISA::IntReg getSyscallArg(ThreadContext *tc, int &i) = 0;
-    virtual TheISA::IntReg getSyscallArg(ThreadContext *tc, int &i, int width);
-    virtual void setSyscallArg(ThreadContext *tc, int i,
-                               TheISA::IntReg val) = 0;
+    virtual RegVal getSyscallArg(ThreadContext *tc, int &i) = 0;
+    virtual RegVal getSyscallArg(ThreadContext *tc, int &i, int width);
+    virtual void setSyscallArg(ThreadContext *tc, int i, RegVal val) = 0;
     virtual void setSyscallReturn(ThreadContext *tc,
                                   SyscallReturn return_value) = 0;
     virtual SyscallDesc *getDesc(int callnum) = 0;
@@ -163,7 +162,7 @@ class Process : public SimObject
                        ThreadContext *new_tc, bool alloc_page);
 
     virtual void clone(ThreadContext *old_tc, ThreadContext *new_tc,
-                       Process *new_p, TheISA::IntReg flags);
+                       Process *new_p, RegVal flags);
 
     // thread contexts associated with this process
     std::vector<ContextID> contextIds;