add annotation code to m5

configs/common/Benchmarks.py:
    add annotate test app
src/SConscript:
    add annotate.cc to lis
src/arch/alpha/isa/decoder.isa:
    add annotate instructions
src/base/traceflags.py:
    Add annotate trace flag
src/sim/pseudo_inst.cc:
src/sim/pseudo_inst.hh:
    add annotate pseudo ops
util/m5/m5op.S:
util/m5/m5op.h:
    add anotate ops

--HG--
extra : convert_revision : 7f965c0d84e41ce34f2ec8ec27a009276d67d8d6

1 files changed, 16 insertions, 0 deletions

diff --git a/src/sim/pseudo_inst.cc b/src/sim/pseudo_inst.cc
index fcf0b957a..bd26e9dc5 100644
--- a/src/sim/pseudo_inst.cc
+++ b/src/sim/pseudo_inst.cc
@@ -36,6 +36,7 @@
 
 #include "sim/pseudo_inst.hh"
 #include "arch/vtophys.hh"
+#include "base/annotate.hh"
 #include "cpu/base.hh"
 #include "cpu/thread_context.hh"
 #include "cpu/quiesce_event.hh"
@@ -188,6 +189,21 @@ namespace AlphaPseudo
     }
 
     void
+    anBegin(ThreadContext *tc, uint64_t cur)
+    {
+        Annotate::annotations.add(tc->getSystemPtr(), 0, cur >> 32, cur &
+                0xFFFFFFFF, 0,0);
+    }
+
+    void
+    anWait(ThreadContext *tc, uint64_t cur, uint64_t wait)
+    {
+        Annotate::annotations.add(tc->getSystemPtr(), 0, cur >> 32, cur &
+                0xFFFFFFFF, wait >> 32, wait & 0xFFFFFFFF);
+    }
+
+
+    void
     dumpresetstats(ThreadContext *tc, Tick delay, Tick period)
     {
         if (!doStatisticsInsts)