Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh.

Further renames/reorganization will be coming shortly; what is currently CPUExecContext (the old ExecContext from m5) will be renamed to SimpleThread or something similar.

src/arch/alpha/arguments.cc:
src/arch/alpha/arguments.hh:
src/arch/alpha/ev5.cc:
src/arch/alpha/faults.cc:
src/arch/alpha/faults.hh:
src/arch/alpha/freebsd/system.cc:
src/arch/alpha/freebsd/system.hh:
src/arch/alpha/isa/branch.isa:
src/arch/alpha/isa/decoder.isa:
src/arch/alpha/isa/main.isa:
src/arch/alpha/linux/process.cc:
src/arch/alpha/linux/system.cc:
src/arch/alpha/linux/system.hh:
src/arch/alpha/linux/threadinfo.hh:
src/arch/alpha/process.cc:
src/arch/alpha/regfile.hh:
src/arch/alpha/stacktrace.cc:
src/arch/alpha/stacktrace.hh:
src/arch/alpha/tlb.cc:
src/arch/alpha/tlb.hh:
src/arch/alpha/tru64/process.cc:
src/arch/alpha/tru64/system.cc:
src/arch/alpha/tru64/system.hh:
src/arch/alpha/utility.hh:
src/arch/alpha/vtophys.cc:
src/arch/alpha/vtophys.hh:
src/arch/mips/faults.cc:
src/arch/mips/faults.hh:
src/arch/mips/isa_traits.cc:
src/arch/mips/isa_traits.hh:
src/arch/mips/linux/process.cc:
src/arch/mips/process.cc:
src/arch/mips/regfile/float_regfile.hh:
src/arch/mips/regfile/int_regfile.hh:
src/arch/mips/regfile/misc_regfile.hh:
src/arch/mips/regfile/regfile.hh:
src/arch/mips/stacktrace.hh:
src/arch/sparc/faults.cc:
src/arch/sparc/faults.hh:
src/arch/sparc/isa_traits.hh:
src/arch/sparc/linux/process.cc:
src/arch/sparc/linux/process.hh:
src/arch/sparc/process.cc:
src/arch/sparc/regfile.hh:
src/arch/sparc/solaris/process.cc:
src/arch/sparc/stacktrace.hh:
src/arch/sparc/ua2005.cc:
src/arch/sparc/utility.hh:
src/arch/sparc/vtophys.cc:
src/arch/sparc/vtophys.hh:
src/base/remote_gdb.cc:
src/base/remote_gdb.hh:
src/cpu/base.cc:
src/cpu/base.hh:
src/cpu/base_dyn_inst.hh:
src/cpu/checker/cpu.cc:
src/cpu/checker/cpu.hh:
src/cpu/checker/exec_context.hh:
src/cpu/cpu_exec_context.cc:
src/cpu/cpu_exec_context.hh:
src/cpu/cpuevent.cc:
src/cpu/cpuevent.hh:
src/cpu/exetrace.hh:
src/cpu/intr_control.cc:
src/cpu/memtest/memtest.hh:
src/cpu/o3/alpha_cpu.hh:
src/cpu/o3/alpha_cpu_impl.hh:
src/cpu/o3/alpha_dyn_inst_impl.hh:
src/cpu/o3/commit.hh:
src/cpu/o3/commit_impl.hh:
src/cpu/o3/cpu.cc:
src/cpu/o3/cpu.hh:
src/cpu/o3/fetch_impl.hh:
src/cpu/o3/regfile.hh:
src/cpu/o3/thread_state.hh:
src/cpu/ozone/back_end.hh:
src/cpu/ozone/cpu.hh:
src/cpu/ozone/cpu_impl.hh:
src/cpu/ozone/front_end.hh:
src/cpu/ozone/front_end_impl.hh:
src/cpu/ozone/inorder_back_end.hh:
src/cpu/ozone/lw_back_end.hh:
src/cpu/ozone/lw_back_end_impl.hh:
src/cpu/ozone/lw_lsq.hh:
src/cpu/ozone/lw_lsq_impl.hh:
src/cpu/ozone/thread_state.hh:
src/cpu/pc_event.cc:
src/cpu/pc_event.hh:
src/cpu/profile.cc:
src/cpu/profile.hh:
src/cpu/quiesce_event.cc:
src/cpu/quiesce_event.hh:
src/cpu/simple/atomic.cc:
src/cpu/simple/base.cc:
src/cpu/simple/base.hh:
src/cpu/simple/timing.cc:
src/cpu/static_inst.cc:
src/cpu/static_inst.hh:
src/cpu/thread_state.hh:
src/dev/alpha_console.cc:
src/dev/ns_gige.cc:
src/dev/sinic.cc:
src/dev/tsunami_cchip.cc:
src/kern/kernel_stats.cc:
src/kern/kernel_stats.hh:
src/kern/linux/events.cc:
src/kern/linux/events.hh:
src/kern/system_events.cc:
src/kern/system_events.hh:
src/kern/tru64/dump_mbuf.cc:
src/kern/tru64/tru64.hh:
src/kern/tru64/tru64_events.cc:
src/kern/tru64/tru64_events.hh:
src/mem/vport.cc:
src/mem/vport.hh:
src/sim/faults.cc:
src/sim/faults.hh:
src/sim/process.cc:
src/sim/process.hh:
src/sim/pseudo_inst.cc:
src/sim/pseudo_inst.hh:
src/sim/syscall_emul.cc:
src/sim/syscall_emul.hh:
src/sim/system.cc:
src/cpu/thread_context.hh:
src/sim/system.hh:
src/sim/vptr.hh:
    Change ExecContext to ThreadContext.

--HG--
rename : src/cpu/exec_context.hh => src/cpu/thread_context.hh
extra : convert_revision : 108bb97d15a114a565a2a6a23faa554f4e2fd77e

1 files changed, 40 insertions, 40 deletions

diff --git a/src/sim/pseudo_inst.cc b/src/sim/pseudo_inst.cc
index 8ad298454..50d949f53 100644
--- a/src/sim/pseudo_inst.cc
+++ b/src/sim/pseudo_inst.cc
@@ -38,7 +38,7 @@
 #include "arch/vtophys.hh"
 #include "cpu/base.hh"
 #include "cpu/sampler/sampler.hh"
-#include "cpu/exec_context.hh"
+#include "cpu/thread_context.hh"
 #include "cpu/quiesce_event.hh"
 #include "kern/kernel_stats.hh"
 #include "sim/param.hh"
@@ -64,94 +64,94 @@ namespace AlphaPseudo
     bool doQuiesce;
 
     void
-    arm(ExecContext *xc)
+    arm(ThreadContext *tc)
     {
-        if (xc->getKernelStats())
-            xc->getKernelStats()->arm();
+        if (tc->getKernelStats())
+            tc->getKernelStats()->arm();
     }
 
     void
-    quiesce(ExecContext *xc)
+    quiesce(ThreadContext *tc)
     {
         if (!doQuiesce)
             return;
 
-        xc->suspend();
-        if (xc->getKernelStats())
-            xc->getKernelStats()->quiesce();
+        tc->suspend();
+        if (tc->getKernelStats())
+            tc->getKernelStats()->quiesce();
     }
 
     void
-    quiesceNs(ExecContext *xc, uint64_t ns)
+    quiesceNs(ThreadContext *tc, uint64_t ns)
     {
         if (!doQuiesce || ns == 0)
             return;
 
-        EndQuiesceEvent *quiesceEvent = xc->getQuiesceEvent();
+        EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
 
         if (quiesceEvent->scheduled())
             quiesceEvent->reschedule(curTick + Clock::Int::ns * ns);
         else
             quiesceEvent->schedule(curTick + Clock::Int::ns * ns);
 
-        xc->suspend();
-        if (xc->getKernelStats())
-            xc->getKernelStats()->quiesce();
+        tc->suspend();
+        if (tc->getKernelStats())
+            tc->getKernelStats()->quiesce();
     }
 
     void
-    quiesceCycles(ExecContext *xc, uint64_t cycles)
+    quiesceCycles(ThreadContext *tc, uint64_t cycles)
     {
         if (!doQuiesce || cycles == 0)
             return;
 
-        EndQuiesceEvent *quiesceEvent = xc->getQuiesceEvent();
+        EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
 
         if (quiesceEvent->scheduled())
             quiesceEvent->reschedule(curTick +
-                                     xc->getCpuPtr()->cycles(cycles));
+                                     tc->getCpuPtr()->cycles(cycles));
         else
             quiesceEvent->schedule(curTick +
-                                   xc->getCpuPtr()->cycles(cycles));
+                                   tc->getCpuPtr()->cycles(cycles));
 
-        xc->suspend();
-        if (xc->getKernelStats())
-            xc->getKernelStats()->quiesce();
+        tc->suspend();
+        if (tc->getKernelStats())
+            tc->getKernelStats()->quiesce();
     }
 
     uint64_t
-    quiesceTime(ExecContext *xc)
+    quiesceTime(ThreadContext *tc)
     {
-        return (xc->readLastActivate() - xc->readLastSuspend()) / Clock::Int::ns;
+        return (tc->readLastActivate() - tc->readLastSuspend()) / Clock::Int::ns;
     }
 
     void
-    ivlb(ExecContext *xc)
+    ivlb(ThreadContext *tc)
     {
-        if (xc->getKernelStats())
-            xc->getKernelStats()->ivlb();
+        if (tc->getKernelStats())
+            tc->getKernelStats()->ivlb();
     }
 
     void
-    ivle(ExecContext *xc)
+    ivle(ThreadContext *tc)
     {
     }
 
     void
-    m5exit_old(ExecContext *xc)
+    m5exit_old(ThreadContext *tc)
     {
         SimExit(curTick, "m5_exit_old instruction encountered");
     }
 
     void
-    m5exit(ExecContext *xc, Tick delay)
+    m5exit(ThreadContext *tc, Tick delay)
     {
         Tick when = curTick + delay * Clock::Int::ns;
         SimExit(when, "m5_exit instruction encountered");
     }
 
     void
-    resetstats(ExecContext *xc, Tick delay, Tick period)
+    resetstats(ThreadContext *tc, Tick delay, Tick period)
     {
         if (!doStatisticsInsts)
             return;
@@ -165,7 +165,7 @@ namespace AlphaPseudo
     }
 
     void
-    dumpstats(ExecContext *xc, Tick delay, Tick period)
+    dumpstats(ThreadContext *tc, Tick delay, Tick period)
     {
         if (!doStatisticsInsts)
             return;
@@ -179,19 +179,19 @@ namespace AlphaPseudo
     }
 
     void
-    addsymbol(ExecContext *xc, Addr addr, Addr symbolAddr)
+    addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr)
     {
         char symb[100];
-        CopyStringOut(xc, symb, symbolAddr, 100);
+        CopyStringOut(tc, symb, symbolAddr, 100);
         std::string symbol(symb);
 
         DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
 
-        xc->getSystemPtr()->kernelSymtab->insert(addr,symbol);
+        tc->getSystemPtr()->kernelSymtab->insert(addr,symbol);
     }
 
     void
-    dumpresetstats(ExecContext *xc, Tick delay, Tick period)
+    dumpresetstats(ThreadContext *tc, Tick delay, Tick period)
     {
         if (!doStatisticsInsts)
             return;
@@ -205,7 +205,7 @@ namespace AlphaPseudo
     }
 
     void
-    m5checkpoint(ExecContext *xc, Tick delay, Tick period)
+    m5checkpoint(ThreadContext *tc, Tick delay, Tick period)
     {
         if (!doCheckpointInsts)
             return;
@@ -218,9 +218,9 @@ namespace AlphaPseudo
     }
 
     uint64_t
-    readfile(ExecContext *xc, Addr vaddr, uint64_t len, uint64_t offset)
+    readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset)
     {
-        const string &file = xc->getCpuPtr()->system->params()->readfile;
+        const string &file = tc->getCpuPtr()->system->params()->readfile;
         if (file.empty()) {
             return ULL(0);
         }
@@ -247,7 +247,7 @@ namespace AlphaPseudo
         }
 
         close(fd);
-        CopyIn(xc, vaddr, buf, result);
+        CopyIn(tc, vaddr, buf, result);
         delete [] buf;
         return result;
     }
@@ -279,12 +279,12 @@ namespace AlphaPseudo
         doCheckpointInsts = __checkpoint;
     }
 
-    void debugbreak(ExecContext *xc)
+    void debugbreak(ThreadContext *tc)
     {
         debug_break();
     }
 
-    void switchcpu(ExecContext *xc)
+    void switchcpu(ThreadContext *tc)
     {
         if (SampCPU)
             SampCPU->switchCPUs();