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| author | Emilio Castillo <ecastill@bsc.es> | 2015-08-26 14:20:30 -0500 |
|---|---|---|
| committer | Emilio Castillo <ecastill@bsc.es> | 2015-08-26 14:20:30 -0500 |
| commit | 88b1fd82a6207c38845c3503ab3037ed40225d80 (patch) | |
| tree | c58e623951bf9850ff561278ecb2507c8174d74c /src/sim/pseudo_inst.cc | |
| parent | ce4f6a90207d98b1b05eca01e621119c1583ced7 (diff) | |
| download | gem5-88b1fd82a6207c38845c3503ab3037ed40225d80.tar.xz | |
cpu: quiesce pseudoinsts: Always do full quiesce
The O3CPU blocks the Fetch when it sees a quiesce instruction (IsQuiesce flag).
When the inst. is executed, a quiesce event is created to reactivate the
context and unblock the Fetch.
If the quiesceNs or quiesceCycles are called with a value of 0, the
QuiesceEvent will not be created and the Fetch stage will remain blocked.
Committed by Joel Hestness <jthestness@gmail.com>
Diffstat (limited to 'src/sim/pseudo_inst.cc')
| -rw-r--r-- | src/sim/pseudo_inst.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/sim/pseudo_inst.cc b/src/sim/pseudo_inst.cc index 80737003c..d4e2085df 100644 --- a/src/sim/pseudo_inst.cc +++ b/src/sim/pseudo_inst.cc @@ -280,7 +280,7 @@ quiesceNs(ThreadContext *tc, uint64_t ns) BaseCPU *cpu = tc->getCpuPtr(); - if (!cpu->params()->do_quiesce || ns == 0) + if (!cpu->params()->do_quiesce) return; EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent(); @@ -306,7 +306,7 @@ quiesceCycles(ThreadContext *tc, uint64_t cycles) BaseCPU *cpu = tc->getCpuPtr(); - if (!cpu->params()->do_quiesce || cycles == 0) + if (!cpu->params()->do_quiesce) return; EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent(); |