diff options
| author | Ali Saidi <Ali.Saidi@ARM.com> | 2011-03-17 19:24:37 -0500 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2011-03-17 19:24:37 -0500 |
| commit | 6daf44dae6dbe931e2a1493cd0e33ca9732509dd (patch) | |
| tree | f8815e56c08a92059b5d576728f564c7bfce7bf0 /src/sim/pseudo_inst.hh | |
| parent | c4de6a05229bbc42ae4b247541c823edb8d4ca76 (diff) | |
| parent | 63eb337b3b93ab71ab3157ec6487901d4fc6cda6 (diff) | |
| download | gem5-6daf44dae6dbe931e2a1493cd0e33ca9732509dd.tar.xz | |
Automated merge with ssh://hg@repo.m5sim.org/m5
Diffstat (limited to 'src/sim/pseudo_inst.hh')
| -rw-r--r-- | src/sim/pseudo_inst.hh | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/sim/pseudo_inst.hh b/src/sim/pseudo_inst.hh index 296b1556b..aec3b5d8a 100644 --- a/src/sim/pseudo_inst.hh +++ b/src/sim/pseudo_inst.hh @@ -45,6 +45,7 @@ extern bool doQuiesce; #if FULL_SYSTEM void arm(ThreadContext *tc); void quiesce(ThreadContext *tc); +void quiesceSkip(ThreadContext *tc); void quiesceNs(ThreadContext *tc, uint64_t ns); void quiesceCycles(ThreadContext *tc, uint64_t cycles); uint64_t quiesceTime(ThreadContext *tc); |