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author | Andreas Sandberg <Andreas.Sandberg@ARM.com> | 2013-04-22 13:20:32 -0400 |
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committer | Andreas Sandberg <Andreas.Sandberg@ARM.com> | 2013-04-22 13:20:32 -0400 |
commit | 1c529a4196a5f9efcce5c639622d5b55912a472b (patch) | |
tree | 52db6a75250edaf7c6ce5b0c53d0feeb2e54011b /src/sim/pseudo_inst.hh | |
parent | 32ecd72b6edc1f33ce757da0b0a8032c31582a7e (diff) | |
download | gem5-1c529a4196a5f9efcce5c639622d5b55912a472b.tar.xz |
sim: Add a helper function to execute pseudo instructions
All architectures execute m5 pseudo instructions by setting up
arguments according to the ABI and executing a magic instruction that
contains an operation number. Handling of such instructions is
currently spread across the different ISA implementations. This
changeset introduces the PseudoInst::pseudoInst function which handles
most of this in an architecture independent way. This is function is
mainly intended to be used from KVM, but can also be used from the
simulated CPUs.
Diffstat (limited to 'src/sim/pseudo_inst.hh')
-rw-r--r-- | src/sim/pseudo_inst.hh | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/src/sim/pseudo_inst.hh b/src/sim/pseudo_inst.hh index efcd44a69..b6e32847a 100644 --- a/src/sim/pseudo_inst.hh +++ b/src/sim/pseudo_inst.hh @@ -1,4 +1,16 @@ /* + * Copyright (c) 2012 ARM Limited + * All rights reserved + * + * The license below extends only to copyright in the software and shall + * not be construed as granting a license to any other intellectual + * property including but not limited to intellectual property relating + * to a hardware implementation of the functionality of the software + * licensed hereunder. You may use the software subject to the license + * terms below provided that you ensure that this notice is replicated + * unmodified and in its entirety in all distributions of the software, + * modified or unmodified, in source code or in binary form. + * * Copyright (c) 2003-2006 The Regents of The University of Michigan * All rights reserved. * @@ -38,6 +50,19 @@ class ThreadContext; namespace PseudoInst { +/** + * Execute a decoded M5 pseudo instruction + * + * The ISA-specific code is responsible to decode the pseudo inst + * function number and subfunction number. After that has been done, + * the rest of the instruction can be implemented in an ISA-agnostic + * manner using the ISA-specific getArguments functions. + * + * @param func M5 pseudo op major function number (see utility/m5/m5ops.h) + * @param subfunc M5 minor function number. Mainly used for annotations. + */ +uint64_t pseudoInst(ThreadContext *tc, uint8_t func, uint8_t subfunc); + void arm(ThreadContext *tc); void quiesce(ThreadContext *tc); void quiesceSkip(ThreadContext *tc); |