diff options
| author | Ali Saidi <Ali.Saidi@ARM.com> | 2011-03-17 19:20:20 -0500 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2011-03-17 19:20:20 -0500 |
| commit | fe3d790ac8da41e8a0b9af93510cd874585c37e7 (patch) | |
| tree | 66f8eefdbe593efcb4de351eda697afc76e1e7c8 /src/sim/pseudo_inst.hh | |
| parent | 845f791f377001bf348d8f99798d4b1b6fb5d581 (diff) | |
| download | gem5-fe3d790ac8da41e8a0b9af93510cd874585c37e7.tar.xz | |
ARM: Allow conditional quiesce instructions.
This patch prevents not executed conditional instructions marked as
IsQuiesce from stalling the pipeline indefinitely. If the instruction
is not executed the quiesceSkip psuedoinst is called which schedules a
wakes up call to the fetch stage.
Diffstat (limited to 'src/sim/pseudo_inst.hh')
| -rw-r--r-- | src/sim/pseudo_inst.hh | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/sim/pseudo_inst.hh b/src/sim/pseudo_inst.hh index 296b1556b..aec3b5d8a 100644 --- a/src/sim/pseudo_inst.hh +++ b/src/sim/pseudo_inst.hh @@ -45,6 +45,7 @@ extern bool doQuiesce; #if FULL_SYSTEM void arm(ThreadContext *tc); void quiesce(ThreadContext *tc); +void quiesceSkip(ThreadContext *tc); void quiesceNs(ThreadContext *tc, uint64_t ns); void quiesceCycles(ThreadContext *tc, uint64_t cycles); uint64_t quiesceTime(ThreadContext *tc); |