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authorAndreas Sandberg <Andreas.Sandberg@ARM.com>2013-01-07 13:05:44 -0500
committerAndreas Sandberg <Andreas.Sandberg@ARM.com>2013-01-07 13:05:44 -0500
commit38925ff62126e43ea3d44ace39d908ba38dfc1af (patch)
tree8c0b37285a3751181aa69f470eb09421f6fc8c5d /src/sim/serialize.hh
parenta7e0cbeb36394eec3960dc0e2fb15377880e9e98 (diff)
downloadgem5-38925ff62126e43ea3d44ace39d908ba38dfc1af.tar.xz
arm: Remove the register mapping hack used when copying TCs
In order to see all registers independent of the current CPU mode, the ARM architecture model uses the magic MISCREG_CPSR_MODE register to change the register mappings without actually updating the CPU mode. This hack is no longer needed since the thread context now provides a flat interface to the register file. This patch replaces the CPSR_MODE hack with the flat register interface.
Diffstat (limited to 'src/sim/serialize.hh')
-rw-r--r--src/sim/serialize.hh2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/sim/serialize.hh b/src/sim/serialize.hh
index c3c857115..dd33ae74f 100644
--- a/src/sim/serialize.hh
+++ b/src/sim/serialize.hh
@@ -57,7 +57,7 @@ class SimObject;
* SimObject shouldn't cause the version number to increase, only changes to
* existing objects such as serializing/unserializing more state, changing sizes
* of serialized arrays, etc. */
-static const uint64_t gem5CheckpointVersion = 0x0000000000000004;
+static const uint64_t gem5CheckpointVersion = 0x0000000000000005;
template <class T>
void paramOut(std::ostream &os, const std::string &name, const T &param);