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| author | Mitch Hayenga <mitch.hayenga@arm.com> | 2014-08-13 06:57:24 -0400 |
|---|---|---|
| committer | Mitch Hayenga <mitch.hayenga@arm.com> | 2014-08-13 06:57:24 -0400 |
| commit | f6f6ae461ee5060127fd42830fc04e5a5f4153a6 (patch) | |
| tree | af9ff66acfa3c84a866a39e2c7dc9ca829024391 /src/sim/sim_events.cc | |
| parent | 66904b9584e09a9b6b6cb382ba208ec9a527edbe (diff) | |
| download | gem5-f6f6ae461ee5060127fd42830fc04e5a5f4153a6.tar.xz | |
mem: Properly set cache block status fields on writebacks
When a cacheline is written back to a lower-level cache,
tags->insertBlock() sets various status parameters. However these
status bits were cleared immediately after calling. This patch makes
it so that these status fields are not cleared by moving them outside
of the tags->insertBlock() call.
Diffstat (limited to 'src/sim/sim_events.cc')
0 files changed, 0 insertions, 0 deletions