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authorSteve Reinhardt ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E%2C%20Ali%20Saidi%20%3CAli.Saidi%40ARM.com%3E) <stever@gmail.com>2013-11-25 11:21:00 -0600
committerSteve Reinhardt ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E%2C%20Ali%20Saidi%20%3CAli.Saidi%40ARM.com%3E) <stever@gmail.com>2013-11-25 11:21:00 -0600
commitde366a16f11b7e27a5b5e064a2a773052568428e (patch)
tree9bed0ebc9801c118e0f17702a979a659a59a67df /src/sim/sim_events.hh
parent8a53da22c2f07aed924a45ab296f7468d842d7f6 (diff)
downloadgem5-de366a16f11b7e27a5b5e064a2a773052568428e.tar.xz
sim: simulate with multiple threads and event queues
This patch adds support for simulating with multiple threads, each of which operates on an event queue. Each sim object specifies which eventq is would like to be on. A custom barrier implementation is being added using which eventqs synchronize. The patch was tested in two different configurations: 1. ruby_network_test.py: in this simulation L1 cache controllers receive requests from the cpu. The requests are replied to immediately without any communication taking place with any other level. 2. twosys-tsunami-simple-atomic: this configuration simulates a client-server system which are connected by an ethernet link. We still lack the ability to communicate using message buffers or ports. But other things like simulation start and end, synchronizing after every quantum are working. Committed by: Nilay Vaish
Diffstat (limited to 'src/sim/sim_events.hh')
-rw-r--r--src/sim/sim_events.hh41
1 files changed, 33 insertions, 8 deletions
diff --git a/src/sim/sim_events.hh b/src/sim/sim_events.hh
index 4abfb317c..5be2609fd 100644
--- a/src/sim/sim_events.hh
+++ b/src/sim/sim_events.hh
@@ -12,6 +12,8 @@
* modified or unmodified, in source code or in binary form.
*
* Copyright (c) 2002-2005 The Regents of The University of Michigan
+ * Copyright (c) 2013 Advanced Micro Devices, Inc.
+ * Copyright (c) 2013 Mark D. Hill and David A. Wood
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -43,13 +45,13 @@
#ifndef __SIM_SIM_EVENTS_HH__
#define __SIM_SIM_EVENTS_HH__
-#include "sim/eventq.hh"
+#include "sim/global_event.hh"
#include "sim/serialize.hh"
//
// Event to terminate simulation at a particular cycle/instruction
//
-class SimLoopExitEvent : public Event
+class GlobalSimLoopExitEvent : public GlobalEvent
{
protected:
// string explaining why we're terminating
@@ -59,12 +61,33 @@ class SimLoopExitEvent : public Event
public:
// non-scheduling version for createForUnserialize()
- SimLoopExitEvent();
- SimLoopExitEvent(const std::string &_cause, int c, Tick repeat = 0,
- bool serialize = false);
+ GlobalSimLoopExitEvent();
+ GlobalSimLoopExitEvent(Tick when, const std::string &_cause, int c,
+ Tick repeat = 0, bool serialize = false);
- std::string getCause() { return cause; }
- int getCode() { return code; }
+ const std::string getCause() const { return cause; }
+ const int getCode() const { return code; }
+
+ void process(); // process event
+
+ virtual const char *description() const;
+};
+
+class LocalSimLoopExitEvent : public Event
+{
+ protected:
+ // string explaining why we're terminating
+ std::string cause;
+ int code;
+ Tick repeat;
+
+ public:
+ LocalSimLoopExitEvent();
+ LocalSimLoopExitEvent(const std::string &_cause, int c, Tick repeat = 0,
+ bool serialize = false);
+
+ const std::string getCause() const { return cause; }
+ const int getCode() const { return code; }
void process(); // process event
@@ -72,6 +95,8 @@ class SimLoopExitEvent : public Event
virtual void serialize(std::ostream &os);
virtual void unserialize(Checkpoint *cp, const std::string &section);
+ virtual void unserialize(Checkpoint *cp, const std::string &section,
+ EventQueue *eventq);
static Serializable *createForUnserialize(Checkpoint *cp,
const std::string &section);
};
@@ -89,7 +114,7 @@ class CountedDrainEvent : public Event
void setCount(int _count) { count = _count; }
- int getCount() { return count; }
+ const int getCount() const { return count; }
};
//