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author | Andreas Sandberg <andreas.sandberg@arm.com> | 2015-10-05 13:13:23 -0500 |
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committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2015-10-05 13:13:23 -0500 |
commit | 17dbb49294e06ce3c486648da899973100c633f1 (patch) | |
tree | f2c3938a7d08d3faf8b50bb5fa6c473cb3135675 /src/sim/sim_exit.hh | |
parent | d1811cc6cf7a57c7b52da7303e6bbb55d9fbe058 (diff) | |
download | gem5-17dbb49294e06ce3c486648da899973100c633f1.tar.xz |
tests: Update SMT tests to correctly configure CPUs
The 01.hello-2T-smt test case for the O3 CPU didn't correctly setup
the number of threads before creating interrupt controllers, which
confused the constructor in BaseCPU. This changeset adds SMT support
to the test configuration infrastructure.
--HG--
rename : tests/configs/o3-timing.py => tests/configs/o3-timing-mt.py
rename : tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini => tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/config.ini
rename : tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/simerr => tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/simerr
rename : tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/simout => tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/simout
rename : tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/stats.txt => tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/stats.txt
Diffstat (limited to 'src/sim/sim_exit.hh')
0 files changed, 0 insertions, 0 deletions