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authorSteve Reinhardt <stever@eecs.umich.edu>2006-05-26 14:33:43 -0400
committerSteve Reinhardt <stever@eecs.umich.edu>2006-05-26 14:33:43 -0400
commit53510f184452c46868a9e6ece9ccb7f30ab70843 (patch)
treecef0d8930a7679e5b8e3c097dda0774386cf3c0d /src/sim/sim_exit.hh
parentacb05ebcf6b6a9891ab856c466bd128f1ea62128 (diff)
downloadgem5-53510f184452c46868a9e6ece9ccb7f30ab70843.tar.xz
Fixes for TimingSimpleCPU under full system. Now boots Alpha Linux!
src/cpu/simple/atomic.cc: src/cpu/simple/base.cc: Move traceData->finalize() into postExecute(). src/cpu/simple/timing.cc: Fixes for full system. Now boots Alpha Linux! - Handle ifetch faults, suspend/resume. - Delete memory request & packet objects on response. - Don't try to do split memory accesses on prefetch references (ISA description doesn't support this). src/cpu/simple/timing.hh: Minor reorganization of internal methods. --HG-- extra : convert_revision : 59e3ee5e4cb53c424ebdbe2e504d97e88c08a978
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