Add in support for quiescing the system, taking checkpoints, restoring from checkpoints, changing memory modes, and switching CPUs.

Key new functions that can be called on the m5 object at the python interpreter:
doQuiesce(root) - A helper function that quiesces the object passed in and all of its children.
resume(root) - Another helper function that tells the object and all of its children that the quiesce is over.
checkpoint(root) - Takes a checkpoint of the system.  Checkpoint directory must be set before hand.
setCheckpointDir(name) - Sets the checkpoint directory.
restoreCheckpoint(root) - Restores the values from the checkpoint located in the checkpoint directory.
changeToAtomic(system) - Changes the system and all of its children to atomic memory mode.
changeToTiming(system) - Changes the system and all of its children to timing memory mode.
switchCpus(list) - Takes in a list of tuples, where each tuple is a pair of (old CPU, new CPU).  Quiesces the old CPUs, and then switches over to the new CPUs.

src/SConscript:
    Remove serializer, replaced by python code.
src/python/m5/__init__.py:
    Updates to support quiescing, checkpointing, changing memory modes, and switching CPUs.
src/python/m5/config.py:
    Several functions defined on the SimObject for quiescing, changing timing modes, and switching CPUs
src/sim/main.cc:
    Add some extra functions that are exported to python through SWIG.
src/sim/serialize.cc:
    Change serialization around a bit.  Now it is controlled through Python, so there's no need for SerializeEvents or SerializeParams.

    Also add in a new unserializeAll() function that loads a checkpoint and handles unserializing all objects.
src/sim/serialize.hh:
    Add unserializeAll function and a setCheckpointName function.
src/sim/sim_events.cc:
    Add process() function for CountedQuiesceEvent, which calls exitSimLoop() once its counter reaches 0.
src/sim/sim_events.hh:
    Add in a CountedQuiesceEvent, which is used when the system is preparing to quiesce.  Any objects that can't be quiesced immediately are given a pointer to a CountedQuiesceEvent.  The event has its counter set via Python, and as objects finish quiescing they call process() on the event.  Eventually the event causes the simulation to stop once all objects have quiesced.
src/sim/sim_object.cc:
    Add a few functions for quiescing, checkpointing, and changing memory modes.
src/sim/sim_object.hh:
    Add a state variable to all SimObjects that tracks both the timing mode of the object and the quiesce state of the object.  Currently this isn't serialized, and I'm not sure it needs to be so long as the timing mode starts up the same after a checkpoint.

--HG--
extra : convert_revision : a8c738d3911c68d5a7caf7de24d732dcc62cfb61

1 files changed, 62 insertions, 2 deletions

diff --git a/src/sim/sim_object.cc b/src/sim/sim_object.cc
index 97e6de439..5752e4ef1 100644
--- a/src/sim/sim_object.cc
+++ b/src/sim/sim_object.cc
@@ -73,6 +73,7 @@ SimObject::SimObject(Params *p)
 
     doRecordEvent = !Stats::event_ignore.match(name());
     simObjectList.push_back(this);
+    state = Atomic;
 }
 
 //
@@ -88,6 +89,7 @@ SimObject::SimObject(const string &_name)
 
     doRecordEvent = !Stats::event_ignore.match(name());
     simObjectList.push_back(this);
+    state = Atomic;
 }
 
 void
@@ -219,6 +221,24 @@ SimObject::serializeAll(ostream &os)
    }
 }
 
+void
+SimObject::unserializeAll(Checkpoint *cp)
+{
+    SimObjectList::reverse_iterator ri = simObjectList.rbegin();
+    SimObjectList::reverse_iterator rend = simObjectList.rend();
+
+    for (; ri != rend; ++ri) {
+        SimObject *obj = *ri;
+        DPRINTFR(Config, "Unserializing '%s'\n",
+                 obj->name());
+        if(cp->sectionExists(obj->name()))
+            obj->unserialize(cp, obj->name());
+        else
+            warn("Not unserializing '%s': no section found in checkpoint.\n",
+                 obj->name());
+   }
+}
+
 #ifdef DEBUG
 //
 // static function: flag which objects should have the debugger break
@@ -251,10 +271,50 @@ SimObject::recordEvent(const std::string &stat)
         Stats::recordEvent(stat);
 }
 
+bool
+SimObject::quiesce(Event *quiesce_event)
+{
+    if (state != QuiescedAtomic && state != Atomic) {
+        panic("Must implement your own quiesce function if it is to be used "
+              "in timing mode!");
+    }
+    state = QuiescedAtomic;
+    return false;
+}
+
+void
+SimObject::resume()
+{
+    if (state == QuiescedAtomic) {
+        state = Atomic;
+    } else if (state == QuiescedTiming) {
+        state = Timing;
+    }
+}
+
+void
+SimObject::setMemoryMode(State new_mode)
+{
+    assert(new_mode == Timing || new_mode == Atomic);
+    if (state == QuiescedAtomic && new_mode == Timing) {
+        state = QuiescedTiming;
+    } else if (state == QuiescedTiming && new_mode == Atomic) {
+        state = QuiescedAtomic;
+    } else {
+        state = new_mode;
+    }
+}
+
+void
+SimObject::switchOut()
+{
+    panic("Unimplemented!");
+}
+
 void
-SimObject::drain(Serializer *serializer)
+SimObject::takeOverFrom(BaseCPU *cpu)
 {
-    serializer->signalDrained();
+    panic("Unimplemented!");
 }
 
 DEFINE_SIM_OBJECT_CLASS_NAME("SimObject", SimObject)