Add in support for quiescing the system, taking checkpoints, restoring from checkpoints, changing memory modes, and switching CPUs.

Key new functions that can be called on the m5 object at the python interpreter:
doQuiesce(root) - A helper function that quiesces the object passed in and all of its children.
resume(root) - Another helper function that tells the object and all of its children that the quiesce is over.
checkpoint(root) - Takes a checkpoint of the system.  Checkpoint directory must be set before hand.
setCheckpointDir(name) - Sets the checkpoint directory.
restoreCheckpoint(root) - Restores the values from the checkpoint located in the checkpoint directory.
changeToAtomic(system) - Changes the system and all of its children to atomic memory mode.
changeToTiming(system) - Changes the system and all of its children to timing memory mode.
switchCpus(list) - Takes in a list of tuples, where each tuple is a pair of (old CPU, new CPU).  Quiesces the old CPUs, and then switches over to the new CPUs.

src/SConscript:
    Remove serializer, replaced by python code.
src/python/m5/__init__.py:
    Updates to support quiescing, checkpointing, changing memory modes, and switching CPUs.
src/python/m5/config.py:
    Several functions defined on the SimObject for quiescing, changing timing modes, and switching CPUs
src/sim/main.cc:
    Add some extra functions that are exported to python through SWIG.
src/sim/serialize.cc:
    Change serialization around a bit.  Now it is controlled through Python, so there's no need for SerializeEvents or SerializeParams.

    Also add in a new unserializeAll() function that loads a checkpoint and handles unserializing all objects.
src/sim/serialize.hh:
    Add unserializeAll function and a setCheckpointName function.
src/sim/sim_events.cc:
    Add process() function for CountedQuiesceEvent, which calls exitSimLoop() once its counter reaches 0.
src/sim/sim_events.hh:
    Add in a CountedQuiesceEvent, which is used when the system is preparing to quiesce.  Any objects that can't be quiesced immediately are given a pointer to a CountedQuiesceEvent.  The event has its counter set via Python, and as objects finish quiescing they call process() on the event.  Eventually the event causes the simulation to stop once all objects have quiesced.
src/sim/sim_object.cc:
    Add a few functions for quiescing, checkpointing, and changing memory modes.
src/sim/sim_object.hh:
    Add a state variable to all SimObjects that tracks both the timing mode of the object and the quiesce state of the object.  Currently this isn't serialized, and I'm not sure it needs to be so long as the timing mode starts up the same after a checkpoint.

--HG--
extra : convert_revision : a8c738d3911c68d5a7caf7de24d732dcc62cfb61

1 files changed, 22 insertions, 7 deletions

diff --git a/src/sim/sim_object.hh b/src/sim/sim_object.hh
index 84e9376a0..e0b21782f 100644
--- a/src/sim/sim_object.hh
+++ b/src/sim/sim_object.hh
@@ -44,7 +44,8 @@
 #include "sim/serialize.hh"
 #include "sim/startup.hh"
 
-class Serializer;
+class BaseCPU;
+class Event;
 
 /*
  * Abstract superclass for simulation objects.  Represents things that
@@ -58,15 +59,26 @@ class SimObject : public Serializable, protected StartupCallback
         std::string name;
     };
 
+    enum State {
+        Atomic,
+        Timing,
+        Quiescing,
+        QuiescedAtomic,
+        QuiescedTiming
+    };
+
   protected:
     Params *_params;
+    State state;
+
+    void changeState(State new_state) { state = new_state; }
 
   public:
     const Params *params() const { return _params; }
 
-  private:
-    friend class Serializer;
+    State getState() { return state; }
 
+  private:
     typedef std::vector<SimObject *> SimObjectList;
 
     // list of all instantiated simulation objects
@@ -100,13 +112,16 @@ class SimObject : public Serializable, protected StartupCallback
 
     // static: call nameOut() & serialize() on all SimObjects
     static void serializeAll(std::ostream &);
+    static void unserializeAll(Checkpoint *cp);
 
     // Methods to drain objects in order to take checkpoints
     // Or switch from timing -> atomic memory model
-    virtual void drain(Serializer *serializer);
-    virtual void resume() { return;} ;
-    virtual void serializationComplete()
-    { assert(0 && "Unimplemented"); };
+    // Quiesce returns true if the SimObject cannot quiesce immediately.
+    virtual bool quiesce(Event *quiesce_event);
+    virtual void resume();
+    virtual void setMemoryMode(State new_mode);
+    virtual void switchOut();
+    virtual void takeOverFrom(BaseCPU *cpu);
 
 #ifdef DEBUG
   public: