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authorDavid Hashe <david.hashe@amd.com>2015-07-20 09:15:18 -0500
committerDavid Hashe <david.hashe@amd.com>2015-07-20 09:15:18 -0500
commit536e3664e41d406af1e618dd02c3222f7cbbcaee (patch)
tree21c28ccccda30a41b5a1330c9de5781e049f02dc /src/sim/syscall_emul_buf.hh
parent910638f3381ab2c421486eb2353ab60e3676688c (diff)
downloadgem5-536e3664e41d406af1e618dd02c3222f7cbbcaee.tar.xz
slicc: support for multiple cache entry types in the same state machine
To have multiple Entry types (e.g., a cache Entry type and a directory Entry type), just declare one of them as a secondary type by using the pair 'main="false"', e.g.: structure(DirEntry, desc="...", interface="AbstractCacheEntry", main="false") { ...and the primary type would be declared: structure(Entry, desc="...", interface="AbstractCacheEntry") {
Diffstat (limited to 'src/sim/syscall_emul_buf.hh')
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