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| author | Gabe Black <gabeblack@google.com> | 2020-01-29 16:49:40 -0800 |
|---|---|---|
| committer | Gabe Black <gabeblack@google.com> | 2020-02-01 12:31:56 +0000 |
| commit | 4ae8d1c0ed18f351b52f421553b28fe109f87665 (patch) | |
| tree | 08f688eed7d45f41f4c3af946bc0afdbf199aebf /src/sim/system.cc | |
| parent | 6a7a5b30050d10a7d9cc9cd5614988871253298d (diff) | |
| download | gem5-4ae8d1c0ed18f351b52f421553b28fe109f87665.tar.xz | |
arch,sim: Merge initCPU into the ISA System classes.
Those classes are already ISA specific, so we can just move initCPU's
contents there and take it out of utility.hh, utility.cc, and the base
System's initState.
Change-Id: I28f0d0b50d83efe5116b0b24d20f8182a02823e7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24905
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/sim/system.cc')
| -rw-r--r-- | src/sim/system.cc | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/sim/system.cc b/src/sim/system.cc index 368eb5419..b5b59ef6d 100644 --- a/src/sim/system.cc +++ b/src/sim/system.cc @@ -349,8 +349,6 @@ void System::initState() { if (FullSystem) { - for (auto *tc: threadContexts) - TheISA::initCPU(tc, tc->contextId()); // Moved from the constructor to here since it relies on the // address map being resolved in the interconnect /** |