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| author | Lisa Hsu <hsul@eecs.umich.edu> | 2008-11-05 15:30:49 -0500 |
|---|---|---|
| committer | Lisa Hsu <hsul@eecs.umich.edu> | 2008-11-05 15:30:49 -0500 |
| commit | 07969dbbf1a737e666b5ba6d34cd7cf2b403a9ad (patch) | |
| tree | c9c5071ab9e25020a4734a266612057a622f219c /src/sim/system.hh | |
| parent | c68032ddcbf0aad10123710e7c7c932bf52061a0 (diff) | |
| download | gem5-07969dbbf1a737e666b5ba6d34cd7cf2b403a9ad.tar.xz | |
Right now a single thread cpu 1 could get assigned context Id != 1, depending
on the order in which it's registered with the system. To make them match,
here is a little change.
Diffstat (limited to 'src/sim/system.hh')
| -rw-r--r-- | src/sim/system.hh | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/sim/system.hh b/src/sim/system.hh index e993a7a50..9715767b1 100644 --- a/src/sim/system.hh +++ b/src/sim/system.hh @@ -224,7 +224,7 @@ class System : public SimObject #endif // FULL_SYSTEM - int registerThreadContext(ThreadContext *tc); + int registerThreadContext(ThreadContext *tc, int assigned=-1); void replaceThreadContext(ThreadContext *tc, int context_id); void serialize(std::ostream &os); |