MEM: Enable multiple distributed generalized memories

This patch removes the assumption on having on single instance of
PhysicalMemory, and enables a distributed memory where the individual
memories in the system are each responsible for a single contiguous
address range.

All memories inherit from an AbstractMemory that encompasses the basic
behaviuor of a random access memory, and provides untimed access
methods. What was previously called PhysicalMemory is now
SimpleMemory, and a subclass of AbstractMemory. All future types of
memory controllers should inherit from AbstractMemory.

To enable e.g. the atomic CPU and RubyPort to access the now
distributed memory, the system has a wrapper class, called
PhysicalMemory that is aware of all the memories in the system and
their associated address ranges. This class thus acts as an
infinitely-fast bus and performs address decoding for these "shortcut"
accesses. Each memory can specify that it should not be part of the
global address map (used e.g. by the functional memories by some
testers). Moreover, each memory can be configured to be reported to
the OS configuration table, useful for populating ATAG structures, and
any potential ACPI tables.

Checkpointing support currently assumes that all memories have the
same size and organisation when creating and resuming from the
checkpoint. A future patch will enable a more flexible
re-organisation.

--HG--
rename : src/mem/PhysicalMemory.py => src/mem/AbstractMemory.py
rename : src/mem/PhysicalMemory.py => src/mem/SimpleMemory.py
rename : src/mem/physical.cc => src/mem/abstract_mem.cc
rename : src/mem/physical.hh => src/mem/abstract_mem.hh
rename : src/mem/physical.cc => src/mem/simple_mem.cc
rename : src/mem/physical.hh => src/mem/simple_mem.hh

1 files changed, 18 insertions, 12 deletions

diff --git a/src/sim/system.hh b/src/sim/system.hh
index d5e45fa0d..7b5ba998e 100644
--- a/src/sim/system.hh
+++ b/src/sim/system.hh
@@ -59,13 +59,13 @@
 #include "mem/fs_translating_port_proxy.hh"
 #include "mem/mem_object.hh"
 #include "mem/port.hh"
+#include "mem/physical.hh"
 #include "params/System.hh"
 
 class BaseCPU;
 class BaseRemoteGDB;
 class GDBListener;
 class ObjectFile;
-class PhysicalMemory;
 class Platform;
 class ThreadContext;
 
@@ -138,7 +138,6 @@ class System : public MemObject
      */
     void setMemoryMode(Enums::MemoryMode mode);
 
-    PhysicalMemory *physmem;
     PCEventQueue pcEventQueue;
 
     std::vector<ThreadContext *> threadContexts;
@@ -159,14 +158,6 @@ class System : public MemObject
      * system.  These threads could be Active or Suspended. */
     int numRunningContexts();
 
-    /** List to store ranges of memories in this system */
-    AddrRangeList memRanges;
-
-    /** check if an address points to valid system memory
-     * and thus we can fetch instructions out of it
-     */
-    bool isMemory(const Addr addr) const;
-
     Addr pagePtr;
 
     uint64_t init_param;
@@ -208,13 +199,28 @@ class System : public MemObject
         return nextPID++;
     }
 
+    /** Get a pointer to access the physical memory of the system */
+    PhysicalMemory& getPhysMem() { return physmem; }
+
     /** Amount of physical memory that is still free */
-    Addr freeMemSize();
+    Addr freeMemSize() const;
 
     /** Amount of physical memory that exists */
-    Addr memSize();
+    Addr memSize() const;
+
+    /**
+     * Check if a physical address is within a range of a memory that
+     * is part of the global address map.
+     *
+     * @param addr A physical address
+     * @return Whether the address corresponds to a memory
+     */
+    bool isMemAddr(Addr addr) const;
 
   protected:
+
+    PhysicalMemory physmem;
+
     Enums::MemoryMode memoryMode;
     uint64_t workItemsBegin;
     uint64_t workItemsEnd;