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authorGabe Black <gblack@eecs.umich.edu>2009-02-25 10:16:15 -0800
committerGabe Black <gblack@eecs.umich.edu>2009-02-25 10:16:15 -0800
commit6ed47e94644f854baa33d1e9f367cc9eebd99abf (patch)
treebc19d10504d3ef0bcaa56b6256cfc732897d1531 /src/sim/tlb.cc
parent15940d06b5f6aabbe917a2a8c4cc4bb1cab991e2 (diff)
downloadgem5-6ed47e94644f854baa33d1e9f367cc9eebd99abf.tar.xz
CPU: Implement translateTiming which defers to translateAtomic, and convert the timing simple CPU to use it.
Diffstat (limited to 'src/sim/tlb.cc')
-rw-r--r--src/sim/tlb.cc8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/sim/tlb.cc b/src/sim/tlb.cc
index f7b57cbbc..e82e4f277 100644
--- a/src/sim/tlb.cc
+++ b/src/sim/tlb.cc
@@ -50,6 +50,14 @@ GenericTLB::translateAtomic(RequestPtr req, ThreadContext * tc, bool)
}
void
+GenericTLB::translateTiming(RequestPtr req, ThreadContext *tc,
+ Translation *translation, bool write)
+{
+ assert(translation);
+ translation->finish(translateAtomic(req, tc, write), req, tc, write);
+}
+
+void
GenericTLB::demapPage(Addr vaddr, uint64_t asn)
{
warn("Demapping pages in the generic TLB is unnecessary.\n");