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authorAndreas Hansson <andreas.hansson@arm.com>2012-10-15 08:12:35 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2012-10-15 08:12:35 -0400
commit2a740aa09682c32eb8f1f8880f279c943d8c6ee1 (patch)
tree61ca1dcb9336bc1f4dbc791c876875c1c260ca8d /src/sim/tlb.hh
parent9baa35ba802f2cfb9fb9ecdebf111f4cd793a428 (diff)
downloadgem5-2a740aa09682c32eb8f1f8880f279c943d8c6ee1.tar.xz
Port: Add protocol-agnostic ports in the port hierarchy
This patch adds an additional level of ports in the inheritance hierarchy, separating out the protocol-specific and protocl-agnostic parts. All the functionality related to the binding of ports is now confined to use BaseMaster/BaseSlavePorts, and all the protocol-specific parts stay in the Master/SlavePort. In the future it will be possible to add other protocol-specific implementations. The functions used in the binding of ports, i.e. getMaster/SlavePort now use the base classes, and the index parameter is updated to use the PortID typedef with the symbolic InvalidPortID as the default.
Diffstat (limited to 'src/sim/tlb.hh')
-rw-r--r--src/sim/tlb.hh4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/sim/tlb.hh b/src/sim/tlb.hh
index 0b89c9bd0..aadf047bf 100644
--- a/src/sim/tlb.hh
+++ b/src/sim/tlb.hh
@@ -49,7 +49,7 @@
#include "sim/sim_object.hh"
class ThreadContext;
-class MasterPort;
+class BaseMasterPort;
class BaseTLB : public SimObject
{
@@ -73,7 +73,7 @@ class BaseTLB : public SimObject
*
* @return A pointer to the walker master port or NULL if not present
*/
- virtual MasterPort* getMasterPort() { return NULL; }
+ virtual BaseMasterPort* getMasterPort() { return NULL; }
class Translation
{