power: Add basic DVFS support for gem5

Adds DVFS capabilities to gem5, by allowing users to specify lists for
frequencies and voltages in SrcClockDomains and VoltageDomains respectively.
A separate component, DVFSHandler, provides a small interface to change
operating points of the associated domains.

Clock domains will be linked to voltage domains and thus allow separate clock,
but shared voltage lines.

Currently all the valid performance-level updates are performed with a fixed
transition latency as specified for the domain.

Config file example:
...
vd = VoltageDomain(voltage = ['1V','0.95V','0.90V','0.85V'])
tsys.cluster1.clk_domain.clock = ['1GHz','700MHz','400MHz','230MHz']
tsys.cluster2.clk_domain.clock = ['1GHz','700MHz','400MHz','230MHz']
tsys.cluster1.clk_domain.domain_id = 0
tsys.cluster2.clk_domain.domain_id = 1
tsys.cluster1.clk_domain.voltage_domain = vd
tsys.cluster2.clk_domain.voltage_domain = vd
tsys.dvfs_handler.domains = [tsys.cluster1.clk_domain,
                             tsys.cluster2.clk_domain]
tsys.dvfs_handler.enable = True

1 files changed, 67 insertions, 15 deletions

diff --git a/src/sim/voltage_domain.hh b/src/sim/voltage_domain.hh
index b2f6715cf..3904c80c9 100644
--- a/src/sim/voltage_domain.hh
+++ b/src/sim/voltage_domain.hh
@@ -41,8 +41,11 @@
 #ifndef __SIM_VOLTAGE_DOMAIN_HH__
 #define __SIM_VOLTAGE_DOMAIN_HH__
 
+#include <vector>
+
 #include "base/statistics.hh"
 #include "params/VoltageDomain.hh"
+#include "sim/clock_domain.hh"
 #include "sim/sim_object.hh"
 
 /**
@@ -52,40 +55,89 @@
  */
 class VoltageDomain : public SimObject
 {
+  public:
 
-  private:
+    typedef VoltageDomainParams Params;
+    VoltageDomain(const Params *p);
 
     /**
-     * The voltage of the domain expressed in Volts
+     * Get the current voltage.
+     *
+     * @return Voltage of the domain
      */
-    double _voltage;
+    double voltage() const { return voltageOpPoints[_perfLevel]; }
+
+    uint32_t numVoltages() const { return (uint32_t)voltageOpPoints.size(); }
+
+    typedef SrcClockDomain::PerfLevel PerfLevel;
 
     /**
-     * Stat for reporting voltage of the domain
+     * Set the voltage point of the domain.
+     * @param Voltage value to be set
      */
-    Stats::Value currentVoltage;
+    void perfLevel(PerfLevel perf_level);
 
-  public:
+    /**
+     * Get the voltage point of the domain.
+     * @param Voltage value to be set
+     */
+    PerfLevel perfLevel() const { return _perfLevel; }
 
-    typedef VoltageDomainParams Params;
-    VoltageDomain(const Params *p);
+    /**
+     * Register a SrcClockDomain with this voltage domain.
+     * @param src_clock_domain The SrcClockDomain to register.
+     */
+    void registerSrcClockDom(SrcClockDomain *src_clock_dom) {
+        assert(src_clock_dom->voltageDomain() == this);
+        srcClockChildren.push_back(src_clock_dom);
+    }
 
     /**
-     * Get the current volate.
-     *
-     * @return Voltage of the domain
+     * Startup has all SrcClockDomains registered with this voltage domain, so
+     * try to make sure that all perf level requests from them are met.
      */
-    inline double voltage() const { return _voltage; }
+    void startup();
 
     /**
-     * Set the voltage of the domain.
+     * Recomputes the highest (fastest, i.e., numerically lowest) requested
+     * performance level of all associated clock domains, and updates the
+     * performance level of this voltage domain to match.  This means that for
+     * two connected clock domains, one fast and one slow, the voltage domain
+     * will provide the voltage associated with the fast DVFS operation point.
+     * Must be called whenever a clock domain decides to swtich its performance
+     * level.
      *
-     * @param Voltage value to be set
+     * @return True, if the voltage was actually changed.
      */
-    void voltage(double voltage);
+    bool sanitiseVoltages();
 
     void regStats();
 
+    void serialize(std::ostream &os);
+    void unserialize(Checkpoint *cp, const std::string &section);
+  private:
+    typedef std::vector<double> Voltages;
+    /**
+     * List of possible minimum voltage at each of the frequency operational
+     * points, should be in descending order and same size as freqOpPoints.
+     * An empty list corresponds to default voltage specified for the voltage
+     * domain its clock domain belongs. The same voltage is applied for each
+     * freqOpPoints, overall implying NO DVS
+     */
+    const Voltages voltageOpPoints;
+    PerfLevel _perfLevel;
+
+    /**
+     * Stat for reporting voltage of the domain
+     */
+    Stats::Value currentVoltage;
+
+    /**
+     * List of associated SrcClockDomains that are connected to this voltage
+     * domain.
+     */
+    typedef std::vector<SrcClockDomain *> SrcClockChildren;
+    SrcClockChildren srcClockChildren;
 };
 
 #endif