cpu: Change thread assignments for heterogenous SMT

Trying to run an SE system with varying threads per core (SMT cores + Non-SMT
cores) caused failures due to the CPU id assignment logic.  The comment
about thread assignment (worrying about core 0 not having tid 0) seems
not to be valid given that our configuration scripts initialize them in
order.

This removes that constraint so a heterogenously threaded sytem can work.

3 files changed, 5 insertions, 0 deletions

diff --git a/src/sim/System.py b/src/sim/System.py
index e24a1e6b2..74dfdca53 100644
--- a/src/sim/System.py
+++ b/src/sim/System.py
@@ -99,6 +99,9 @@ class System(MemObject):
             "Address to mask loading binaries with")
     load_offset = Param.UInt64(0, "Address to offset loading binaries with")
 
+    multi_thread = Param.Bool(False,
+            "Supports multi-threaded CPUs? Impacts Thread/Context IDs")
+
     # Dynamic voltage and frequency handler for the system, disabled by default
     # Provide list of domains that need to be controlled by the handler
     dvfs_handler = DVFSHandler()
diff --git a/src/sim/system.cc b/src/sim/system.cc
index d0418d99b..2e74d01c8 100644
--- a/src/sim/system.cc
+++ b/src/sim/system.cc
@@ -80,6 +80,7 @@ int System::numSystemsRunning = 0;
 System::System(Params *p)
     : MemObject(p), _systemPort("system_port", this),
       _numContexts(0),
+      multiThread(p->multi_thread),
       pagePtr(0),
       init_param(p->init_param),
       physProxy(_systemPort, p->cache_line_size),
diff --git a/src/sim/system.hh b/src/sim/system.hh
index 634c78a6a..82096826d 100644
--- a/src/sim/system.hh
+++ b/src/sim/system.hh
@@ -196,6 +196,7 @@ class System : public MemObject
 
     std::vector<ThreadContext *> threadContexts;
     int _numContexts;
+    const bool multiThread;
 
     ThreadContext *getThreadContext(ContextID tid)
     {