diff options
author | Prakash Ramrakhyani <Prakash.Ramrakhyani@arm.com> | 2012-01-09 18:08:20 -0600 |
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committer | Prakash Ramrakhyani <Prakash.Ramrakhyani@arm.com> | 2012-01-09 18:08:20 -0600 |
commit | 51aa7e4a0392d5e8f98bd7a4d09f4026dd21bd0a (patch) | |
tree | 4a93fd0bdfd9e4403053e10ac329500649216f08 /src/sim | |
parent | 525d1e46dcb3180c8d73996adc025ce255575bd7 (diff) | |
download | gem5-51aa7e4a0392d5e8f98bd7a4d09f4026dd21bd0a.tar.xz |
sim: Enable sampling of run-time for code-sections marked using pseudo insts.
This patch adds a mechanism to collect run time samples for specific portions
of a benchmark, using work_begin and work_end pseudo instructions.It also enhances
the histogram stat to report geometric mean.
Diffstat (limited to 'src/sim')
-rw-r--r-- | src/sim/System.py | 2 | ||||
-rw-r--r-- | src/sim/pseudo_inst.cc | 2 | ||||
-rw-r--r-- | src/sim/system.cc | 50 | ||||
-rw-r--r-- | src/sim/system.hh | 14 |
4 files changed, 65 insertions, 3 deletions
diff --git a/src/sim/System.py b/src/sim/System.py index d9836211f..3caa907d7 100644 --- a/src/sim/System.py +++ b/src/sim/System.py @@ -54,8 +54,8 @@ class System(SimObject): physmem = Param.PhysicalMemory("Physical Memory") mem_mode = Param.MemoryMode('atomic', "The mode the memory system is in") memories = VectorParam.PhysicalMemory(Self.all, "All memories is the system") - work_item_id = Param.Int(-1, "specific work item id") + num_work_ids = Param.Int(16, "Number of distinct work item types") work_begin_cpu_id_exit = Param.Int(-1, "work started on specific id, now exit simulation") work_begin_ckpt_count = Param.Counter(0, diff --git a/src/sim/pseudo_inst.cc b/src/sim/pseudo_inst.cc index 2062dfb8c..647420ca1 100644 --- a/src/sim/pseudo_inst.cc +++ b/src/sim/pseudo_inst.cc @@ -383,6 +383,7 @@ workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid) tc->getCpuPtr()->workItemBegin(); System *sys = tc->getSystemPtr(); const System::Params *params = sys->params(); + sys->workItemBegin(threadid, workid); DPRINTF(WorkItems, "Work Begin workid: %d, threadid %d\n", workid, threadid); @@ -439,6 +440,7 @@ workend(ThreadContext *tc, uint64_t workid, uint64_t threadid) tc->getCpuPtr()->workItemEnd(); System *sys = tc->getSystemPtr(); const System::Params *params = sys->params(); + sys->workItemEnd(threadid, workid); DPRINTF(WorkItems, "Work End workid: %d, threadid %d\n", workid, threadid); diff --git a/src/sim/system.cc b/src/sim/system.cc index c58830c10..556a919d5 100644 --- a/src/sim/system.cc +++ b/src/sim/system.cc @@ -1,4 +1,16 @@ /* + * Copyright (c) 2011 ARM Limited + * All rights reserved + * + * The license below extends only to copyright in the software and shall + * not be construed as granting a license to any other intellectual + * property including but not limited to intellectual property relating + * to a hardware implementation of the functionality of the software + * licensed hereunder. You may use the software subject to the license + * terms below provided that you ensure that this notice is replicated + * unmodified and in its entirety in all distributions of the software, + * modified or unmodified, in source code or in binary form. + * * Copyright (c) 2003-2006 The Regents of The University of Michigan * Copyright (c) 2011 Regents of the University of California * All rights reserved. @@ -43,6 +55,7 @@ #include "config/the_isa.hh" #include "cpu/thread_context.hh" #include "debug/Loader.hh" +#include "debug/WorkItems.hh" #include "mem/mem_object.hh" #include "mem/physical.hh" #include "sim/byteswap.hh" @@ -76,8 +89,9 @@ System::System(Params *p) memoryMode(p->mem_mode), workItemsBegin(0), workItemsEnd(0), + numWorkIds(p->num_work_ids), _params(p), - totalNumInsts(0), + totalNumInsts(0), instEventQueue("system instruction-based event queue") { // add self to global system list @@ -171,6 +185,9 @@ System::~System() panic("System::fixFuncEventAddr needs to be rewritten " "to work with syscall emulation"); #endif // FULL_SYSTEM} + + for (uint32_t j = 0; j < numWorkIds; j++) + delete workItemStats[j]; } void @@ -340,6 +357,37 @@ System::unserialize(Checkpoint *cp, const string §ion) } void +System::regStats() +{ + for (uint32_t j = 0; j < numWorkIds ; j++) { + workItemStats[j] = new Stats::Histogram(); + stringstream namestr; + ccprintf(namestr, "work_item_type%d", j); + workItemStats[j]->init(20) + .name(name() + "." + namestr.str()) + .desc("Run time stat for" + namestr.str()) + .prereq(*workItemStats[j]); + } +} + +void +System::workItemEnd(uint32_t tid, uint32_t workid) +{ + std::pair<uint32_t,uint32_t> p(tid, workid); + if (!lastWorkItemStarted.count(p)) + return; + + Tick samp = curTick() - lastWorkItemStarted[p]; + DPRINTF(WorkItems, "Work item end: %d\t%d\t%lld\n", tid, workid, samp); + + if (workid >= numWorkIds) + fatal("Got workid greater than specified in system configuration\n"); + + workItemStats[workid]->sample(samp); + lastWorkItemStarted.erase(p); +} + +void System::printSystems() { vector<System *>::iterator i = systemList.begin(); diff --git a/src/sim/system.hh b/src/sim/system.hh index ed5193dfd..44383c399 100644 --- a/src/sim/system.hh +++ b/src/sim/system.hh @@ -171,14 +171,16 @@ class System : public SimObject Enums::MemoryMode memoryMode; uint64_t workItemsBegin; uint64_t workItemsEnd; + uint32_t numWorkIds; std::vector<bool> activeCpus; public: + virtual void regStats(); /** * Called by pseudo_inst to track the number of work items started by this * system. */ - uint64_t + uint64_t incWorkItemsBegin() { return ++workItemsBegin; @@ -212,6 +214,14 @@ class System : public SimObject return count; } + inline void workItemBegin(uint32_t tid, uint32_t workid) + { + std::pair<uint32_t,uint32_t> p(tid, workid); + lastWorkItemStarted[p] = curTick(); + } + + void workItemEnd(uint32_t tid, uint32_t workid); + #if FULL_SYSTEM /** * Fix up an address used to match PCs for hooking simulator @@ -303,6 +313,8 @@ class System : public SimObject public: Counter totalNumInsts; EventQueue instEventQueue; + std::map<std::pair<uint32_t,uint32_t>, Tick> lastWorkItemStarted; + std::map<uint32_t, Stats::Histogram*> workItemStats; //////////////////////////////////////////// // |