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authorAndreas Sandberg <andreas.sandberg@arm.com>2017-01-30 12:00:05 +0000
committerAndreas Sandberg <andreas.sandberg@arm.com>2017-05-02 12:37:32 +0000
commitb046be6858c0a9ea3df48ff77481577226dcd8e8 (patch)
tree15a2a4844b0d54b0280ed24c7cd3900274d01734 /src/sim
parent8eb84518f15fcef59da90e7ec72e2bc88fb5b59d (diff)
downloadgem5-b046be6858c0a9ea3df48ff77481577226dcd8e8.tar.xz
base, sim, dev: Remove SWIG
Remove SWIG guards and SWIG-specific C++ code. Change-Id: Icaad6720513b6f48153727ef3f70e0dba0df4bee Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Andreas Hansson <andreas.hansson@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2921 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com>
Diffstat (limited to 'src/sim')
-rw-r--r--src/sim/core.cc2
-rw-r--r--src/sim/drain.hh4
-rw-r--r--src/sim/eventq.hh11
-rw-r--r--src/sim/init.cc38
-rw-r--r--src/sim/init.hh12
-rw-r--r--src/sim/simulate.cc2
-rw-r--r--src/sim/stat_register.hh2
7 files changed, 4 insertions, 67 deletions
diff --git a/src/sim/core.cc b/src/sim/core.cc
index 279012f9b..00df23ed6 100644
--- a/src/sim/core.cc
+++ b/src/sim/core.cc
@@ -119,7 +119,7 @@ registerExitCallback(Callback *callback)
}
/**
- * Do C++ simulator exit processing. Exported to SWIG to be invoked
+ * Do C++ simulator exit processing. Exported to Python to be invoked
* when simulator terminates via Python's atexit mechanism.
*/
void
diff --git a/src/sim/drain.hh b/src/sim/drain.hh
index 7ff1d6e2a..3b01630a9 100644
--- a/src/sim/drain.hh
+++ b/src/sim/drain.hh
@@ -46,7 +46,6 @@
class Drainable;
-#ifndef SWIG // SWIG doesn't support strongly typed enums
/**
* Object drain/handover states
*
@@ -75,7 +74,6 @@ enum class DrainState {
Drained, /** Buffers drained, ready for serialization/handover */
Resuming, /** Transient state while the simulator is resuming */
};
-#endif
/**
* This class coordinates draining of a System.
@@ -97,9 +95,7 @@ class DrainManager
{
private:
DrainManager();
-#ifndef SWIG
DrainManager(DrainManager &) = delete;
-#endif
~DrainManager();
public:
diff --git a/src/sim/eventq.hh b/src/sim/eventq.hh
index 0b76491ca..95a36ca7b 100644
--- a/src/sim/eventq.hh
+++ b/src/sim/eventq.hh
@@ -67,14 +67,11 @@ extern uint32_t numMainEventQueues;
//! Array for main event queues.
extern std::vector<EventQueue *> mainEventQueue;
-#ifndef SWIG
//! The current event queue for the running thread. Access to this queue
//! does not require any locking from the thread.
extern __thread EventQueue *_curEventQueue;
-#endif
-
//! Current mode of execution: parallel / serial
extern bool inParallelMode;
@@ -356,13 +353,10 @@ class Event : public EventBase, public Serializable
//! NULL. (Overridden in GlobalEvent::BarrierEvent.)
virtual BaseGlobalEvent *globalEvent() { return NULL; }
-#ifndef SWIG
void serialize(CheckpointOut &cp) const override;
void unserialize(CheckpointIn &cp) override;
-#endif
};
-#ifndef SWIG
inline bool
operator<(const Event &l, const Event &r)
{
@@ -401,7 +395,6 @@ operator!=(const Event &l, const Event &r)
{
return l.when() != r.when() || l.priority() != r.priority();
}
-#endif
/**
* Queue of events sorted in time order
@@ -489,7 +482,6 @@ class EventQueue
EventQueue(const EventQueue &);
public:
-#ifndef SWIG
/**
* Temporarily migrate execution to a different event queue.
*
@@ -549,7 +541,6 @@ class EventQueue
private:
EventQueue &eq;
};
-#endif
EventQueue(const std::string &n);
@@ -665,7 +656,6 @@ class EventQueue
void dumpMainQueue();
-#ifndef SWIG
class EventManager
{
protected:
@@ -778,6 +768,5 @@ class EventWrapper : public Event
const char *description() const { return "EventWrapped"; }
};
-#endif
#endif // __SIM_EVENTQ_HH__
diff --git a/src/sim/init.cc b/src/sim/init.cc
index 33cd4040f..70578197f 100644
--- a/src/sim/init.cc
+++ b/src/sim/init.cc
@@ -127,8 +127,7 @@ EmbeddedPython::addModule() const
}
/*
- * Load and initialize all of the python parts of M5, including Swig
- * and the embedded module importer.
+ * Load and initialize all of the python parts of M5.
*/
int
EmbeddedPython::initAll()
@@ -152,40 +151,6 @@ EmbeddedPython::initAll()
return 0;
}
-EmbeddedSwig::EmbeddedSwig(void (*init_func)(), const string& _context)
- : initFunc(init_func), context(_context)
-{
- getList().push_back(this);
-}
-
-list<EmbeddedSwig *> &
-EmbeddedSwig::getList()
-{
- static list<EmbeddedSwig *> the_list;
- return the_list;
-}
-
-void
-EmbeddedSwig::initAll()
-{
- char* old_context = _Py_PackageContext;
- // initialize SWIG modules. initFunc() is autogenerated and calls
- // all of the individual swig initialization functions.
- for (auto i : getList()) {
- // to ensure that the loaded modules are placed in the right
- // package we have to be a bit unorthodox and directly
- // manipulate the package context since swig simply calls
- // Py_InitModule with nothing but the module name of the
- // wrapper
- char* cstr = new char[i->context.size() + 1];
- strcpy(cstr, i->context.c_str());
- _Py_PackageContext = cstr;
- i->initFunc();
- delete[] cstr;
- }
- _Py_PackageContext = old_context;
-}
-
EmbeddedPyBind::EmbeddedPyBind(const char *_name,
void (*init_func)(py::module &),
const char *_base)
@@ -265,7 +230,6 @@ EmbeddedPyBind::initAll()
int
initM5Python()
{
- EmbeddedSwig::initAll();
EmbeddedPyBind::initAll();
return EmbeddedPython::initAll();
}
diff --git a/src/sim/init.hh b/src/sim/init.hh
index ecc4bc347..de6b44de4 100644
--- a/src/sim/init.hh
+++ b/src/sim/init.hh
@@ -80,18 +80,6 @@ struct EmbeddedPython
static int initAll();
};
-struct EmbeddedSwig
-{
- void (*initFunc)();
-
- std::string context;
-
- EmbeddedSwig(void (*init_func)(), const std::string& _context);
-
- static std::list<EmbeddedSwig *> &getList();
- static void initAll();
-};
-
class EmbeddedPyBind
{
public:
diff --git a/src/sim/simulate.cc b/src/sim/simulate.cc
index c6eb2ddf6..d3c27fa08 100644
--- a/src/sim/simulate.cc
+++ b/src/sim/simulate.cc
@@ -76,7 +76,7 @@ GlobalSimLoopExitEvent *simulate_limit_event = nullptr;
/** Simulate for num_cycles additional cycles. If num_cycles is -1
* (the default), do not limit simulation; some other event must
- * terminate the loop. Exported to Python via SWIG.
+ * terminate the loop. Exported to Python.
* @return The SimLoopExitEvent that caused the loop to exit.
*/
GlobalSimLoopExitEvent *
diff --git a/src/sim/stat_register.hh b/src/sim/stat_register.hh
index bbe909321..36c015757 100644
--- a/src/sim/stat_register.hh
+++ b/src/sim/stat_register.hh
@@ -38,7 +38,7 @@
*/
/* Provide a mechanism to register the Python stats reset/dump functions
- * defined in src/swig/python/stats.i with the mechanisms in namespace
+ * defined in src/python/pybind11/stats.cc with the mechanisms in namespace
* Stats */
#ifndef __SIM_STAT_REGISTER_H__