Merge zizzer:/bk/newmem

into  zower.eecs.umich.edu:/eecshome/m5/newmem

--HG--
extra : convert_revision : f4a05accb8fa24d425dd818b1b7f268378180e99

1 files changed, 2 insertions, 7 deletions

diff --git a/src/sim/main.cc b/src/sim/main.cc
index 17209ac20..04dbe1ef4 100644
--- a/src/sim/main.cc
+++ b/src/sim/main.cc
@@ -60,6 +60,7 @@
 #include "cpu/smt.hh"
 #include "mem/mem_object.hh"
 #include "mem/port.hh"
+#include "python/swig/init.hh"
 #include "sim/async.hh"
 #include "sim/builder.hh"
 #include "sim/host.hh"
@@ -117,11 +118,6 @@ abortHandler(int sigtype)
 #endif
 }
 
-extern "C" {
-void init_main();
-void init_debug();
-}
-
 int
 main(int argc, char **argv)
 {
@@ -159,8 +155,7 @@ main(int argc, char **argv)
     PySys_SetArgv(argc, argv);
 
     // initialize SWIG modules
-    init_main();
-    init_debug();
+    init_swig();
 
     PyRun_SimpleString("import m5.main");
     PyRun_SimpleString("m5.main.main()");