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authorGabe Black <gblack@eecs.umich.edu>2007-08-26 20:33:57 -0700
committerGabe Black <gblack@eecs.umich.edu>2007-08-26 20:33:57 -0700
commit9b49a78cfdc0bd6f8afdb0d066ea39778095d7ac (patch)
treeb4a977c8d7379ac552d245847825a73b61bf8c5b /src/sim
parent80d51650c8bce1503e5ce3877f3bfe21d3e57d45 (diff)
downloadgem5-9b49a78cfdc0bd6f8afdb0d066ea39778095d7ac.tar.xz
Address translation: Make the page table more flexible.
The page table now stores actual page table entries. It is still a templated class here, but this will be corrected in the near future. --HG-- extra : convert_revision : 804dcc6320414c2b3ab76a74a15295bd24e1d13d
Diffstat (limited to 'src/sim')
-rw-r--r--src/sim/faults.cc8
-rw-r--r--src/sim/faults.hh16
-rw-r--r--src/sim/tlb.cc22
-rw-r--r--src/sim/tlb.hh48
4 files changed, 67 insertions, 27 deletions
diff --git a/src/sim/faults.cc b/src/sim/faults.cc
index fe62874d7..6d6a8b5f6 100644
--- a/src/sim/faults.cc
+++ b/src/sim/faults.cc
@@ -56,8 +56,9 @@ void UnimpFault::invoke(ThreadContext * tc)
{
panic("Unimpfault: %s\n", panicStr.c_str());
}
+
#if !FULL_SYSTEM
-void PageTableFault::invoke(ThreadContext *tc)
+void GenericPageTableFault::invoke(ThreadContext *tc)
{
Process *p = tc->getProcessPtr();
@@ -65,4 +66,9 @@ void PageTableFault::invoke(ThreadContext *tc)
panic("Page table fault when accessing virtual address %#x\n", vaddr);
}
+
+void GenericAlignmentFault::invoke(ThreadContext *tc)
+{
+ panic("Alignment fault when accessing virtual address %#x\n", vaddr);
+}
#endif
diff --git a/src/sim/faults.hh b/src/sim/faults.hh
index f2e638945..cfc6ad105 100644
--- a/src/sim/faults.hh
+++ b/src/sim/faults.hh
@@ -77,13 +77,23 @@ class UnimpFault : public FaultBase
};
#if !FULL_SYSTEM
-class PageTableFault : public FaultBase
+class GenericPageTableFault : public FaultBase
{
private:
Addr vaddr;
public:
- FaultName name() const {return "M5 page table fault";}
- PageTableFault(Addr va) : vaddr(va) {}
+ FaultName name() const {return "Generic page table fault";}
+ GenericPageTableFault(Addr va) : vaddr(va) {}
+ void invoke(ThreadContext * tc);
+};
+
+class GenericAlignmentFault : public FaultBase
+{
+ private:
+ Addr vaddr;
+ public:
+ FaultName name() const {return "Generic alignment fault";}
+ GenericAlignmentFault(Addr va) : vaddr(va) {}
void invoke(ThreadContext * tc);
};
#endif
diff --git a/src/sim/tlb.cc b/src/sim/tlb.cc
index 9c3166280..5ceec637e 100644
--- a/src/sim/tlb.cc
+++ b/src/sim/tlb.cc
@@ -34,21 +34,17 @@
#include "sim/tlb.hh"
Fault
-GenericITB::translate(RequestPtr &req, ThreadContext *tc)
+GenericTLBBase::translate(RequestPtr req, ThreadContext * tc)
{
#if FULL_SYSTEM
- panic("Generic ITB translation shouldn't be used in full system mode.\n");
+ panic("Generic translation shouldn't be used in full system mode.\n");
#else
- return tc->getProcessPtr()->pTable->translate(req);
-#endif
-}
+ Process * p = tc->getProcessPtr();
-Fault
-GenericDTB::translate(RequestPtr &req, ThreadContext *tc, bool write)
-{
-#if FULL_SYSTEM
- panic("Generic DTB translation shouldn't be used in full system mode.\n");
-#else
- return tc->getProcessPtr()->pTable->translate(req);
+ Fault fault = p->pTable->translate(req);
+ if(fault != NoFault)
+ return fault;
+
+ return NoFault;
#endif
-};
+}
diff --git a/src/sim/tlb.hh b/src/sim/tlb.hh
index 8e291ecc9..b54eb501f 100644
--- a/src/sim/tlb.hh
+++ b/src/sim/tlb.hh
@@ -31,36 +31,64 @@
#ifndef __SIM_TLB_HH__
#define __SIM_TLB_HH__
+#include "base/misc.hh"
#include "mem/request.hh"
-#include "sim/sim_object.hh"
#include "sim/faults.hh"
+#include "sim/sim_object.hh"
class ThreadContext;
class Packet;
-class GenericTLB : public SimObject
+class GenericTLBBase : public SimObject
{
- public:
- GenericTLB(const std::string &name) : SimObject(name)
+ protected:
+ GenericTLBBase(const std::string &name) : SimObject(name)
{}
+
+ Fault translate(RequestPtr req, ThreadContext *tc);
};
-class GenericITB : public GenericTLB
+template <bool doSizeCheck=true, bool doAlignmentCheck=true>
+class GenericTLB : public GenericTLBBase
{
public:
- GenericITB(const std::string &name) : GenericTLB(name)
+ GenericTLB(const std::string &name) : GenericTLBBase(name)
{}
- Fault translate(RequestPtr &req, ThreadContext *tc);
+ Fault translate(RequestPtr req, ThreadContext *tc, bool=false)
+ {
+ Fault fault = GenericTLBBase::translate(req, tc);
+ if (fault != NoFault)
+ return fault;
+
+ typeof(req->getSize()) size = req->getSize();
+ Addr paddr = req->getPaddr();
+
+ if(doSizeCheck && !isPowerOf2(size))
+ panic("Invalid request size!\n");
+ if (doAlignmentCheck && ((size - 1) & paddr))
+ return Fault(new GenericAlignmentFault(paddr));
+
+ return NoFault;
+ }
};
-class GenericDTB : public GenericTLB
+template <bool doSizeCheck=true, bool doAlignmentCheck=true>
+class GenericITB : public GenericTLB<doSizeCheck, doAlignmentCheck>
{
public:
- GenericDTB(const std::string &name) : GenericTLB(name)
+ GenericITB(const std::string &name) :
+ GenericTLB<doSizeCheck, doAlignmentCheck>(name)
{}
+};
- Fault translate(RequestPtr &req, ThreadContext *tc, bool write);
+template <bool doSizeCheck=true, bool doAlignmentCheck=true>
+class GenericDTB : public GenericTLB<doSizeCheck, doAlignmentCheck>
+{
+ public:
+ GenericDTB(const std::string &name) :
+ GenericTLB<doSizeCheck, doAlignmentCheck>(name)
+ {}
};
#endif // __ARCH_SPARC_TLB_HH__