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authorAnthony Gutierrez <atgutier@umich.edu>2012-08-15 10:38:08 -0400
committerAnthony Gutierrez <atgutier@umich.edu>2012-08-15 10:38:08 -0400
commit0b3897fc90901953e9d016466c37ab507f85023c (patch)
tree0e8b1fec8d7c4871686903d573e9fd0fd8734d1e /src/sim
parent5a648f2074caad8aee97e03f27e8eecc527a2cba (diff)
downloadgem5-0b3897fc90901953e9d016466c37ab507f85023c.tar.xz
O3,ARM: fix some problems with drain/switchout functionality and add Drain DPRINTFs
This patch fixes some problems with the drain/switchout functionality for the O3 cpu and for the ARM ISA and adds some useful debug print statements. This is an incremental fix as there are still a few bugs/mem leaks with the switchout code. Particularly when switching from an O3CPU to a TimingSimpleCPU. However, when switching from O3 to O3 cores with the ARM ISA I haven't encountered any more assertion failures; now the kernel will typically panic inside of simulation.
Diffstat (limited to 'src/sim')
-rw-r--r--src/sim/SConscript1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/sim/SConscript b/src/sim/SConscript
index 25b965d59..9f76d6381 100644
--- a/src/sim/SConscript
+++ b/src/sim/SConscript
@@ -62,6 +62,7 @@ if env['TARGET_ISA'] != 'no':
DebugFlag('Checkpoint')
DebugFlag('Config')
+DebugFlag('Drain')
DebugFlag('Event')
DebugFlag('Fault')
DebugFlag('Flow')