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author | Ali Saidi <Ali.Saidi@ARM.com> | 2015-01-25 07:22:26 -0500 |
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committer | Ali Saidi <Ali.Saidi@ARM.com> | 2015-01-25 07:22:26 -0500 |
commit | f6742ea26e1a1cac21b486c7c5adad6fb6304e92 (patch) | |
tree | 416505359d690d558ba4f579123b5aba43da68d9 /src/sim | |
parent | 0bd986015b2de741dc741f10e5afeaf5d8890ba1 (diff) | |
download | gem5-f6742ea26e1a1cac21b486c7c5adad6fb6304e92.tar.xz |
cpu: Remove all notion that we know when the cpu is misspeculating.
We have no way of knowing if a CPU model is on the wrong path with
our execute-in-execute CPU models. Don't pretend that we do.
Diffstat (limited to 'src/sim')
-rw-r--r-- | src/sim/faults.cc | 1 | ||||
-rw-r--r-- | src/sim/insttracer.hh | 6 |
2 files changed, 2 insertions, 5 deletions
diff --git a/src/sim/faults.cc b/src/sim/faults.cc index e2562fca6..abcad6d3c 100644 --- a/src/sim/faults.cc +++ b/src/sim/faults.cc @@ -43,7 +43,6 @@ void FaultBase::invoke(ThreadContext * tc, const StaticInstPtr &inst) { if (FullSystem) { DPRINTF(Fault, "Fault %s at PC: %s\n", name(), tc->pcState()); - assert(!tc->misspeculating()); } else { panic("fault (%s) detected @ PC %s", name(), tc->pcState()); } diff --git a/src/sim/insttracer.hh b/src/sim/insttracer.hh index df1f12766..b4605a2c9 100644 --- a/src/sim/insttracer.hh +++ b/src/sim/insttracer.hh @@ -56,7 +56,6 @@ class InstRecord StaticInstPtr staticInst; TheISA::PCState pc; StaticInstPtr macroStaticInst; - bool misspeculating; bool predicate; // The remaining fields are only valid for particular instruction @@ -89,12 +88,12 @@ class InstRecord public: InstRecord(Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, - TheISA::PCState _pc, bool spec, + TheISA::PCState _pc, const StaticInstPtr _macroStaticInst = NULL) : when(_when), thread(_thread), staticInst(_staticInst), pc(_pc), macroStaticInst(_macroStaticInst), - misspeculating(spec), predicate(true), addr(0), addr_valid(false), + predicate(true), addr(0), addr_valid(false), data_status(DataInvalid), fetch_seq(0), fetch_seq_valid(false), cp_seq(0), cp_seq_valid(false) { @@ -136,7 +135,6 @@ class InstRecord StaticInstPtr getStaticInst() { return staticInst; } TheISA::PCState getPCState() { return pc; } StaticInstPtr getMacroStaticInst() { return macroStaticInst; } - bool getMisspeculating() { return misspeculating; } Addr getAddr() { return addr; } bool getAddrValid() { return addr_valid; } |