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authorARM gem5 Developers <none@none>2014-01-24 15:29:34 -0600
committerARM gem5 Developers <none@none>2014-01-24 15:29:34 -0600
commit612f8f074fa1099cf70faf495d46cc647762a031 (patch)
treebd1e99c43bf15292395eadd4b7ae3f5c823545c3 /src/sim
parentf3585c841e964c98911784a187fc4f081a02a0a6 (diff)
downloadgem5-612f8f074fa1099cf70faf495d46cc647762a031.tar.xz
arm: Add support for ARMv8 (AArch64 & AArch32)
Note: AArch64 and AArch32 interworking is not supported. If you use an AArch64 kernel you are restricted to AArch64 user-mode binaries. This will be addressed in a later patch. Note: Virtualization is only supported in AArch32 mode. This will also be fixed in a later patch. Contributors: Giacomo Gabrielli (TrustZone, LPAE, system-level AArch64, AArch64 NEON, validation) Thomas Grocutt (AArch32 Virtualization, AArch64 FP, validation) Mbou Eyole (AArch64 NEON, validation) Ali Saidi (AArch64 Linux support, code integration, validation) Edmund Grimley-Evans (AArch64 FP) William Wang (AArch64 Linux support) Rene De Jong (AArch64 Linux support, performance opt.) Matt Horsnell (AArch64 MP, validation) Matt Evans (device models, code integration, validation) Chris Adeniyi-Jones (AArch64 syscall-emulation) Prakash Ramrakhyani (validation) Dam Sunwoo (validation) Chander Sudanthi (validation) Stephan Diestelhorst (validation) Andreas Hansson (code integration, performance opt.) Eric Van Hensbergen (performance opt.) Gabe Black
Diffstat (limited to 'src/sim')
-rw-r--r--src/sim/System.py3
-rw-r--r--src/sim/process.cc13
-rw-r--r--src/sim/serialize.hh2
-rw-r--r--src/sim/system.cc12
-rw-r--r--src/sim/system.hh13
5 files changed, 30 insertions, 13 deletions
diff --git a/src/sim/System.py b/src/sim/System.py
index 302e2fa60..95162be89 100644
--- a/src/sim/System.py
+++ b/src/sim/System.py
@@ -86,4 +86,5 @@ class System(MemObject):
readfile = Param.String("", "file to read startup script from")
symbolfile = Param.String("", "file to get the symbols from")
load_addr_mask = Param.UInt64(0xffffffffff,
- "Address to mask loading binaries with");
+ "Address to mask loading binaries with")
+ load_offset = Param.UInt64(0, "Address to offset loading binaries with")
diff --git a/src/sim/process.cc b/src/sim/process.cc
index 1654ea5c5..ccaac2096 100644
--- a/src/sim/process.cc
+++ b/src/sim/process.cc
@@ -695,15 +695,22 @@ LiveProcess::create(LiveProcessParams * params)
fatal("Unknown/unsupported operating system.");
}
#elif THE_ISA == ARM_ISA
- if (objFile->getArch() != ObjectFile::Arm &&
- objFile->getArch() != ObjectFile::Thumb)
+ ObjectFile::Arch arch = objFile->getArch();
+ if (arch != ObjectFile::Arm && arch != ObjectFile::Thumb &&
+ arch != ObjectFile::Arm64)
fatal("Object file architecture does not match compiled ISA (ARM).");
switch (objFile->getOpSys()) {
case ObjectFile::UnknownOpSys:
warn("Unknown operating system; assuming Linux.");
// fall through
case ObjectFile::Linux:
- process = new ArmLinuxProcess(params, objFile, objFile->getArch());
+ if (arch == ObjectFile::Arm64) {
+ process = new ArmLinuxProcess64(params, objFile,
+ objFile->getArch());
+ } else {
+ process = new ArmLinuxProcess32(params, objFile,
+ objFile->getArch());
+ }
break;
case ObjectFile::LinuxArmOABI:
fatal("M5 does not support ARM OABI binaries. Please recompile with an"
diff --git a/src/sim/serialize.hh b/src/sim/serialize.hh
index 6d4207090..bbf759cf6 100644
--- a/src/sim/serialize.hh
+++ b/src/sim/serialize.hh
@@ -58,7 +58,7 @@ class EventQueue;
* SimObject shouldn't cause the version number to increase, only changes to
* existing objects such as serializing/unserializing more state, changing sizes
* of serialized arrays, etc. */
-static const uint64_t gem5CheckpointVersion = 0x0000000000000008;
+static const uint64_t gem5CheckpointVersion = 0x0000000000000009;
template <class T>
void paramOut(std::ostream &os, const std::string &name, const T &param);
diff --git a/src/sim/system.cc b/src/sim/system.cc
index 7de483216..e2bf0a3d2 100644
--- a/src/sim/system.cc
+++ b/src/sim/system.cc
@@ -79,6 +79,7 @@ System::System(Params *p)
init_param(p->init_param),
physProxy(_systemPort, p->cache_line_size),
loadAddrMask(p->load_addr_mask),
+ loadAddrOffset(p->load_offset),
nextPID(0),
physmem(name() + ".physmem", p->memories),
memoryMode(p->mem_mode),
@@ -274,14 +275,15 @@ System::initState()
*/
if (params()->kernel != "") {
// Validate kernel mapping before loading binary
- if (!(isMemAddr(kernelStart & loadAddrMask) &&
- isMemAddr(kernelEnd & loadAddrMask))) {
+ if (!(isMemAddr((kernelStart & loadAddrMask) + loadAddrOffset) &&
+ isMemAddr((kernelEnd & loadAddrMask) + loadAddrOffset))) {
fatal("Kernel is mapped to invalid location (not memory). "
- "kernelStart 0x(%x) - kernelEnd 0x(%x)\n", kernelStart,
- kernelEnd);
+ "kernelStart 0x(%x) - kernelEnd 0x(%x) %#x:%#x\n", kernelStart,
+ kernelEnd, (kernelStart & loadAddrMask) + loadAddrOffset,
+ (kernelEnd & loadAddrMask) + loadAddrOffset);
}
// Load program sections into memory
- kernel->loadSections(physProxy, loadAddrMask);
+ kernel->loadSections(physProxy, loadAddrMask, loadAddrOffset);
DPRINTF(Loader, "Kernel start = %#x\n", kernelStart);
DPRINTF(Loader, "Kernel end = %#x\n", kernelEnd);
diff --git a/src/sim/system.hh b/src/sim/system.hh
index c8945c8c1..ecef2c4f2 100644
--- a/src/sim/system.hh
+++ b/src/sim/system.hh
@@ -237,6 +237,13 @@ class System : public MemObject
*/
Addr loadAddrMask;
+ /** Offset that should be used for binary/symbol loading.
+ * This further allows more flexibily than the loadAddrMask allows alone in
+ * loading kernels and similar. The loadAddrOffset is applied after the
+ * loadAddrMask.
+ */
+ Addr loadAddrOffset;
+
protected:
uint64_t nextPID;
@@ -321,7 +328,7 @@ class System : public MemObject
* Called by pseudo_inst to track the number of work items completed by
* this system.
*/
- uint64_t
+ uint64_t
incWorkItemsEnd()
{
return ++workItemsEnd;
@@ -332,13 +339,13 @@ class System : public MemObject
* Returns the total number of cpus that have executed work item begin or
* ends.
*/
- int
+ int
markWorkItem(int index)
{
int count = 0;
assert(index < activeCpus.size());
activeCpus[index] = true;
- for (std::vector<bool>::iterator i = activeCpus.begin();
+ for (std::vector<bool>::iterator i = activeCpus.begin();
i < activeCpus.end(); i++) {
if (*i) count++;
}