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authorAndreas Hansson <andreas.hansson@arm.com>2015-02-16 03:33:47 -0500
committerAndreas Hansson <andreas.hansson@arm.com>2015-02-16 03:33:47 -0500
commite17328a227a47089e6f3c8fd82cc988f03807549 (patch)
treec78336b4caff2c1ab31180efdd4c8298c890aee6 /src/sim
parent57758ca685fe1a736cfdc214785b04441e83e53a (diff)
downloadgem5-e17328a227a47089e6f3c8fd82cc988f03807549.tar.xz
mem: mmap the backing store with MAP_NORESERVE
This patch ensures we can run simulations with very large simulated memories (at least 64 TB based on some quick runs on a Linux workstation). In essence this allows us to efficiently deal with sparse address maps without having to implement a redirection layer in the backing store. This opens up for run-time errors if we eventually exhausts the hosts memory and swap space, but this should hopefully never happen.
Diffstat (limited to 'src/sim')
-rw-r--r--src/sim/System.py7
-rw-r--r--src/sim/system.cc2
2 files changed, 8 insertions, 1 deletions
diff --git a/src/sim/System.py b/src/sim/System.py
index 630cd2a84..e24a1e6b2 100644
--- a/src/sim/System.py
+++ b/src/sim/System.py
@@ -59,6 +59,13 @@ class System(MemObject):
"All memories in the system")
mem_mode = Param.MemoryMode('atomic', "The mode the memory system is in")
+ # When reserving memory on the host, we have the option of
+ # reserving swap space or not (by passing MAP_NORESERVE to
+ # mmap). By enabling this flag, we accomodate cases where a large
+ # (but sparse) memory is simulated.
+ mmap_using_noreserve = Param.Bool(False, "mmap the backing store " \
+ "without reserving swap")
+
# The memory ranges are to be populated when creating the system
# such that these can be passed from the I/O subsystem through an
# I/O bridge or cache
diff --git a/src/sim/system.cc b/src/sim/system.cc
index c311d65b9..9bd487b03 100644
--- a/src/sim/system.cc
+++ b/src/sim/system.cc
@@ -88,7 +88,7 @@ System::System(Params *p)
loadAddrMask(p->load_addr_mask),
loadAddrOffset(p->load_offset),
nextPID(0),
- physmem(name() + ".physmem", p->memories),
+ physmem(name() + ".physmem", p->memories, p->mmap_using_noreserve),
memoryMode(p->mem_mode),
_cacheLineSize(p->cache_line_size),
workItemsBegin(0),