misc: Remove redundant compiler-specific defines

This patch moves away from using M5_ATTR_OVERRIDE and the m5::hashmap
(and similar) abstractions, as these are no longer needed with gcc 4.7
and clang 3.1 as minimum compiler versions.

13 files changed, 32 insertions, 32 deletions

diff --git a/src/sim/clock_domain.hh b/src/sim/clock_domain.hh
index e0dce973b..cc26d7bbd 100644
--- a/src/sim/clock_domain.hh
+++ b/src/sim/clock_domain.hh
@@ -239,8 +239,8 @@ class SrcClockDomain : public ClockDomain
 
     void startup();
 
-    void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
-    void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
+    void serialize(CheckpointOut &cp) const override;
+    void unserialize(CheckpointIn &cp) override;
 
   private:
     /**
diff --git a/src/sim/dvfs_handler.hh b/src/sim/dvfs_handler.hh
index 6e495fff5..f587f7c25 100644
--- a/src/sim/dvfs_handler.hh
+++ b/src/sim/dvfs_handler.hh
@@ -198,8 +198,8 @@ class DVFSHandler : public SimObject
      */
     bool isEnabled() const { return enableHandler; }
 
-    void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
-    void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
+    void serialize(CheckpointOut &cp) const override;
+    void unserialize(CheckpointIn &cp) override;
 
   private:
     typedef std::map<DomainID, SrcClockDomain*> Domains;
diff --git a/src/sim/eventq.cc b/src/sim/eventq.cc
index 604de4a71..698ecd116 100644
--- a/src/sim/eventq.cc
+++ b/src/sim/eventq.cc
@@ -35,9 +35,9 @@
 #include <cassert>
 #include <iostream>
 #include <string>
+#include <unordered_map>
 #include <vector>
 
-#include "base/hashmap.hh"
 #include "base/misc.hh"
 #include "base/trace.hh"
 #include "cpu/smt.hh"
@@ -319,7 +319,7 @@ EventQueue::dump() const
 bool
 EventQueue::debugVerify() const
 {
-    m5::hash_map<long, bool> map;
+    std::unordered_map<long, bool> map;
 
     Tick time = 0;
     short priority = 0;
diff --git a/src/sim/eventq.hh b/src/sim/eventq.hh
index db134a4be..184d6ec3b 100644
--- a/src/sim/eventq.hh
+++ b/src/sim/eventq.hh
@@ -358,8 +358,8 @@ class Event : public EventBase, public Serializable
     virtual BaseGlobalEvent *globalEvent() { return NULL; }
 
 #ifndef SWIG
-    void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
-    void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
+    void serialize(CheckpointOut &cp) const override;
+    void unserialize(CheckpointIn &cp) override;
 #endif
 };
 
diff --git a/src/sim/fd_entry.hh b/src/sim/fd_entry.hh
index e0fd0b0a2..0cbb769b5 100644
--- a/src/sim/fd_entry.hh
+++ b/src/sim/fd_entry.hh
@@ -56,8 +56,8 @@ class FDEntry : public Serializable
           fileOffset(0), filename(""), driver(NULL)
     { }
 
-    void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
-    void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
+    void serialize(CheckpointOut &cp) const override;
+    void unserialize(CheckpointIn &cp) override;
 
     /**
      * Check if the target file descriptor is in use.
diff --git a/src/sim/process.hh b/src/sim/process.hh
index 43d1a4edc..b3a33bcd9 100644
--- a/src/sim/process.hh
+++ b/src/sim/process.hh
@@ -122,7 +122,7 @@ class Process : public SimObject
 
     virtual void initState();
 
-    DrainState drain() M5_ATTR_OVERRIDE;
+    DrainState drain() override;
 
   public:
 
@@ -223,8 +223,8 @@ class Process : public SimObject
      */
     bool map(Addr vaddr, Addr paddr, int size, bool cacheable = true);
 
-    void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
-    void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
+    void serialize(CheckpointOut &cp) const override;
+    void unserialize(CheckpointIn &cp) override;
 };
 
 //
diff --git a/src/sim/root.hh b/src/sim/root.hh
index 1c330e2c4..4d9c63a6b 100644
--- a/src/sim/root.hh
+++ b/src/sim/root.hh
@@ -106,14 +106,14 @@ class Root : public SimObject
 
     /** Schedule the timesync event at loadState() so that curTick is correct
      */
-    void loadState(CheckpointIn &cp) M5_ATTR_OVERRIDE;
+    void loadState(CheckpointIn &cp) override;
 
     /** Schedule the timesync event at initState() when not unserializing
      */
     void initState();
 
-    void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
-    void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
+    void serialize(CheckpointOut &cp) const override;
+    void unserialize(CheckpointIn &cp) override;
 };
 
 #endif // __SIM_ROOT_HH__
diff --git a/src/sim/serialize.cc b/src/sim/serialize.cc
index f9a945b95..90cb5e288 100644
--- a/src/sim/serialize.cc
+++ b/src/sim/serialize.cc
@@ -487,8 +487,8 @@ class Globals : public Serializable
     Globals()
         : unserializedCurTick(0) {}
 
-    void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
-    void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
+    void serialize(CheckpointOut &cp) const override;
+    void unserialize(CheckpointIn &cp) override;
 
     Tick unserializedCurTick;
 };
diff --git a/src/sim/sim_events.hh b/src/sim/sim_events.hh
index 8a384019a..dbbc5174f 100644
--- a/src/sim/sim_events.hh
+++ b/src/sim/sim_events.hh
@@ -92,8 +92,8 @@ class LocalSimLoopExitEvent : public Event
 
     virtual const char *description() const;
 
-    void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
-    void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
+    void serialize(CheckpointOut &cp) const override;
+    void unserialize(CheckpointIn &cp) override;
     static Serializable *createForUnserialize(CheckpointIn &cp,
                                               const std::string &section);
 };
diff --git a/src/sim/sim_object.hh b/src/sim/sim_object.hh
index d2cedf5be..7c1452f01 100644
--- a/src/sim/sim_object.hh
+++ b/src/sim/sim_object.hh
@@ -184,7 +184,7 @@ class SimObject : public EventManager, public Serializable, public Drainable
      * Provide a default implementation of the drain interface for
      * objects that don't need draining.
      */
-    DrainState drain() M5_ATTR_OVERRIDE { return DrainState::Drained; }
+    DrainState drain() override { return DrainState::Drained; }
 
     /**
      * Write back dirty buffers to memory using functional writes.
@@ -209,8 +209,8 @@ class SimObject : public EventManager, public Serializable, public Drainable
      */
     virtual void memInvalidate() {};
 
-    void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE {};
-    void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE {};
+    void serialize(CheckpointOut &cp) const override {};
+    void unserialize(CheckpointIn &cp) override {};
 
     /**
      * Serialize all SimObjects in the system.
diff --git a/src/sim/system.hh b/src/sim/system.hh
index 82096826d..be0538839 100644
--- a/src/sim/system.hh
+++ b/src/sim/system.hh
@@ -519,10 +519,10 @@ class System : public MemObject
                                     ContextID assigned = InvalidContextID);
     void replaceThreadContext(ThreadContext *tc, ContextID context_id);
 
-    void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
-    void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
+    void serialize(CheckpointOut &cp) const override;
+    void unserialize(CheckpointIn &cp) override;
 
-    void drainResume() M5_ATTR_OVERRIDE;
+    void drainResume() override;
 
   public:
     Counter totalNumInsts;
diff --git a/src/sim/ticked_object.hh b/src/sim/ticked_object.hh
index 97750873f..c3c6a0153 100644
--- a/src/sim/ticked_object.hh
+++ b/src/sim/ticked_object.hh
@@ -164,8 +164,8 @@ class Ticked : public Serializable
     }
 
     /** Checkpoint lastStopped */
-    void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
-    void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
+    void serialize(CheckpointOut &cp) const override;
+    void unserialize(CheckpointIn &cp) override;
 
     /** Action to call on the clock tick */
     virtual void evaluate() = 0;
@@ -199,8 +199,8 @@ class TickedObject : public ClockedObject, public Ticked
 
     /** Pass on regStats, serialize etc. onto Ticked */
     void regStats();
-    void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
-    void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
+    void serialize(CheckpointOut &cp) const override;
+    void unserialize(CheckpointIn &cp) override;
 };
 
 #endif /* __SIM_TICKED_OBJECT_HH__ */
diff --git a/src/sim/voltage_domain.hh b/src/sim/voltage_domain.hh
index 596daba40..d22556083 100644
--- a/src/sim/voltage_domain.hh
+++ b/src/sim/voltage_domain.hh
@@ -128,8 +128,8 @@ class VoltageDomain : public SimObject
 
     void regStats();
 
-    void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
-    void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
+    void serialize(CheckpointOut &cp) const override;
+    void unserialize(CheckpointIn &cp) override;
 
   private:
     typedef std::vector<double> Voltages;