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authorAli Saidi <saidi@eecs.umich.edu>2006-09-11 17:57:30 -0400
committerAli Saidi <saidi@eecs.umich.edu>2006-09-11 17:57:30 -0400
commit44c6f953b0a448bd27b8354de90db8934b3ca799 (patch)
treefb51f30f84c61e091a142dce3e1c30c689fd3826 /src/sim
parent9e6d12b0959544e0fad8f84644f2c6471a5ef272 (diff)
parent46502851abffd70328ef605b1fa6056f873848e9 (diff)
downloadgem5-44c6f953b0a448bd27b8354de90db8934b3ca799.tar.xz
Merge zizzer:/bk/newmem
into zeep.pool:/z/saidi/work/m5.newmem.head --HG-- extra : convert_revision : 14ac24236ff65b7e489c1ce4b4e9a295966013b8
Diffstat (limited to 'src/sim')
-rw-r--r--src/sim/pseudo_inst.cc16
-rw-r--r--src/sim/pseudo_inst.hh2
2 files changed, 18 insertions, 0 deletions
diff --git a/src/sim/pseudo_inst.cc b/src/sim/pseudo_inst.cc
index fcf0b957a..bd26e9dc5 100644
--- a/src/sim/pseudo_inst.cc
+++ b/src/sim/pseudo_inst.cc
@@ -36,6 +36,7 @@
#include "sim/pseudo_inst.hh"
#include "arch/vtophys.hh"
+#include "base/annotate.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
#include "cpu/quiesce_event.hh"
@@ -188,6 +189,21 @@ namespace AlphaPseudo
}
void
+ anBegin(ThreadContext *tc, uint64_t cur)
+ {
+ Annotate::annotations.add(tc->getSystemPtr(), 0, cur >> 32, cur &
+ 0xFFFFFFFF, 0,0);
+ }
+
+ void
+ anWait(ThreadContext *tc, uint64_t cur, uint64_t wait)
+ {
+ Annotate::annotations.add(tc->getSystemPtr(), 0, cur >> 32, cur &
+ 0xFFFFFFFF, wait >> 32, wait & 0xFFFFFFFF);
+ }
+
+
+ void
dumpresetstats(ThreadContext *tc, Tick delay, Tick period)
{
if (!doStatisticsInsts)
diff --git a/src/sim/pseudo_inst.hh b/src/sim/pseudo_inst.hh
index 4a83b93e0..da2fb4ee3 100644
--- a/src/sim/pseudo_inst.hh
+++ b/src/sim/pseudo_inst.hh
@@ -59,4 +59,6 @@ namespace AlphaPseudo
void debugbreak(ThreadContext *tc);
void switchcpu(ThreadContext *tc);
void addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr);
+ void anBegin(ThreadContext *tc, uint64_t cur);
+ void anWait(ThreadContext *tc, uint64_t cur, uint64_t wait);
}