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| author | Giacomo Gabrielli <giacomo.gabrielli@arm.com> | 2019-11-07 09:37:25 +0000 |
|---|---|---|
| committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2020-01-03 08:17:22 +0000 |
| commit | 68288f344bebff2e4fbfe63dcc84e166a423dd6c (patch) | |
| tree | c908f10fdbbf98d823bbcb595e5b32052fedfd1b /src/sim | |
| parent | bd32682445150c234f83872e135bc959247a4065 (diff) | |
| download | gem5-68288f344bebff2e4fbfe63dcc84e166a423dd6c.tar.xz | |
cpu: Fix issue with MinorCPU predicated-false mem. accesses
The code block was relying on passed_predicate only (conditional
execution). This was not covering the case where the instruction
gets executed, but the predicate register is false. Using the inLSQ
variable is covering both cases and it makes more sense in terms of
readibility.
Change-Id: Ie1954f37968379a5bda9d0dc9f824a68304cc229
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23280
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/sim')
0 files changed, 0 insertions, 0 deletions