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| author | Austin Harris <austinharris@utexas.edu> | 2018-12-26 19:19:00 -0600 |
|---|---|---|
| committer | Austin Harris <austin.dane.harris@gmail.com> | 2019-02-07 01:48:08 +0000 |
| commit | 9c5373ca61587409e4d0f6ad4c032e8d53be28ca (patch) | |
| tree | 21f173c01ba01f908b4eb449cf43b6b628081a91 /src/sim | |
| parent | ea487f9bb7b35556a39ef25765859330e62b11ae (diff) | |
| download | gem5-9c5373ca61587409e4d0f6ad4c032e8d53be28ca.tar.xz | |
arch-riscv: Enable support for riscv 32-bit in SE mode.
This patch splits up the riscv SE mode support for 32 and 64-bit.
A future patch will add support for decoding rv32 instructions.
Change-Id: Ia79ae19f753caf94dc7e5830a6630efb94b419d7
Signed-off-by: Austin Harris <austinharris@utexas.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/15355
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Alec Roelke <alec.roelke@gmail.com>
Maintainer: Alec Roelke <alec.roelke@gmail.com>
Diffstat (limited to 'src/sim')
| -rw-r--r-- | src/sim/process.cc | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/src/sim/process.cc b/src/sim/process.cc index 62959b4c5..c4dd64107 100644 --- a/src/sim/process.cc +++ b/src/sim/process.cc @@ -623,14 +623,19 @@ ProcessParams::create() fatal("Unknown/unsupported operating system."); } #elif THE_ISA == RISCV_ISA - if (obj_file->getArch() != ObjectFile::Riscv) + ObjectFile::Arch arch = obj_file->getArch(); + if (arch != ObjectFile::Riscv64 && arch != ObjectFile::Riscv32) fatal("Object file architecture does not match compiled ISA (RISCV)."); switch (obj_file->getOpSys()) { case ObjectFile::UnknownOpSys: warn("Unknown operating system; assuming Linux."); // fall through case ObjectFile::Linux: - process = new RiscvLinuxProcess(this, obj_file); + if (arch == ObjectFile::Riscv64) { + process = new RiscvLinuxProcess64(this, obj_file); + } else { + process = new RiscvLinuxProcess32(this, obj_file); + } break; default: fatal("Unknown/unsupported operating system."); |