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| author | Gabe Black <gblack@eecs.umich.edu> | 2011-10-30 03:06:37 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2011-10-30 03:06:37 -0700 |
| commit | ca77249b0cc767096508867328bee77ce5b2ccf6 (patch) | |
| tree | 6396a9e614ee553605e8b55d345d3d0b6ff7bfd7 /src/sim | |
| parent | 0c81db77f218d414e13f4721f19b1f7ac5305592 (diff) | |
| download | gem5-ca77249b0cc767096508867328bee77ce5b2ccf6.tar.xz | |
SE/FS: Build syscall_emul.cc in FS mode.
Diffstat (limited to 'src/sim')
| -rw-r--r-- | src/sim/SConscript | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/sim/SConscript b/src/sim/SConscript index d9d8ded24..0f241df92 100644 --- a/src/sim/SConscript +++ b/src/sim/SConscript @@ -46,6 +46,7 @@ Source('sim_events.cc') Source('sim_object.cc') Source('simulate.cc') Source('stat_control.cc') +Source('syscall_emul.cc') if env['TARGET_ISA'] != 'no': SimObject('Process.py') @@ -60,8 +61,6 @@ if env['FULL_SYSTEM']: elif env['TARGET_ISA'] != 'no': Source('tlb.cc') - Source('syscall_emul.cc') - DebugFlag('Checkpoint') DebugFlag('Config') DebugFlag('Event') |