summaryrefslogtreecommitdiff
path: root/src/sim
diff options
context:
space:
mode:
authorTuan Ta <qtt2@cornell.edu>2018-04-02 15:20:02 -0400
committerTuan Ta <qtt2@cornell.edu>2019-02-08 15:18:22 +0000
commite5415671bd8871b99e754b5db75714a6492c0917 (patch)
tree25d3409d7122244587748ca24f57956fbf5680d2 /src/sim
parentaefae9d6f8768128b8797534f76b3e7b9e409af4 (diff)
downloadgem5-e5415671bd8871b99e754b5db75714a6492c0917.tar.xz
cpu: fixed how O3 CPU executes an exit system call
When a thread executed an exit syscall in SE mode, the thread context was removed immediately in the same cycle, which left inflight squash operations and trap event incomplete. The problem happened when a new thread was assigned to the CPU later. The new thread started with some incomplete transactions of the previous thread (e.g., squashing). This problem could cause incorrect execution flow for the new thread (i.e., pc was not reset properly at the exit point), deadlock (i.e., some stage-to-stage signals were not reset) and incorrect rename map between logical and physical registers. This patch adds a new state called 'Halting' to the thread context and defers removing thread context from a CPU until a trap event initiated by an exit syscall execution is processed. This patch also makes sure that the removal of a thread context happens after all inflight transactions of the to-be-removed thread in the pipeline complete. Change-Id: If7ef1462fb8864e22b45371ee7ae67e2a5ad38b8 Reviewed-on: https://gem5-review.googlesource.com/c/8184 Reviewed-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/sim')
-rw-r--r--src/sim/eventq.hh3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/sim/eventq.hh b/src/sim/eventq.hh
index 6e8e63338..895f69424 100644
--- a/src/sim/eventq.hh
+++ b/src/sim/eventq.hh
@@ -161,6 +161,9 @@ class EventBase
/// (such as writebacks).
static const Priority CPU_Tick_Pri = 50;
+ /// If we want to exit a thread in a CPU, it comes after CPU_Tick_Pri
+ static const Priority CPU_Exit_Pri = 64;
+
/// Statistics events (dump, reset, etc.) come after
/// everything else, but before exit.
static const Priority Stat_Event_Pri = 90;