summaryrefslogtreecommitdiff
path: root/src/sim
diff options
context:
space:
mode:
authorKevin Lim <ktlim@umich.edu>2006-07-05 23:38:11 -0400
committerKevin Lim <ktlim@umich.edu>2006-07-05 23:38:11 -0400
commiteceba1405a70db1a1bc5538af99baca8fef422b6 (patch)
tree9eb5c79c2b2350abb2be3b1b580a741ad0569b97 /src/sim
parentd598061dd6e9aa83ef2613e2c7825a491c53b893 (diff)
downloadgem5-eceba1405a70db1a1bc5538af99baca8fef422b6.tar.xz
For now using the checkpoint or switchcpu pseudo instructions will return control to Python, returning the cause to be the instruction name. The user's script must then interpret the reason for exiting the simulation loop and handle the action accordingly. This may change in the future.
src/sim/pseudo_inst.cc: Exit sim loop with a specific string to indicate to Python what caused the exit. The user's script needs to interpret the exit events and handle them as desired. --HG-- extra : convert_revision : 8eb4a42285dacb3ada3a791173c605b5acb78598
Diffstat (limited to 'src/sim')
-rw-r--r--src/sim/pseudo_inst.cc2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/sim/pseudo_inst.cc b/src/sim/pseudo_inst.cc
index dc08e6c06..869805f5c 100644
--- a/src/sim/pseudo_inst.cc
+++ b/src/sim/pseudo_inst.cc
@@ -207,6 +207,7 @@ namespace AlphaPseudo
{
if (!doCheckpointInsts)
return;
+ exitSimLoop("checkpoint");
}
uint64_t
@@ -278,5 +279,6 @@ namespace AlphaPseudo
void switchcpu(ThreadContext *tc)
{
+ exitSimLoop("switchcpu");
}
}