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| author | Ciro Santilli <ciro.santilli@arm.com> | 2019-10-08 14:52:03 +0100 |
|---|---|---|
| committer | Ciro Santilli <ciro.santilli@arm.com> | 2019-11-26 12:46:59 +0000 |
| commit | ffd75f5942c6654950810a95dd07326ea85a5084 (patch) | |
| tree | 259b29e4fc22a71ee52ebc38b9373255f00c2c10 /src/sim | |
| parent | 1ef80a590e509daa70e08c44f22f8f2cfbcf4bc1 (diff) | |
| download | gem5-ffd75f5942c6654950810a95dd07326ea85a5084.tar.xz | |
cpu: prefix ExecEnable to the native trace to match DPRINTF
The trace mechanism appears to be the only debug flag that does not
go through DPRINTF, presumably for performance reasons.
This patch manually adds that to make things uniform with other debug
flags, e.g. with FmtFlag,ExecAll,SyscallBase a sample output looks like
(truncated to fit into commit message lengths):
0: ExecEnable: system.cpu : A0 T0 : @asm_main_after_prologue
500: ExecEnable: system.cpu : A0 T0 : @asm_main_after_prologue+4
1000: ExecEnable: system.cpu : A0 T0 : @asm_main_after_prologue+8
1500: ExecEnable: system.cpu : A0 T0 : @asm_main_after_prologue+12
2000: ExecEnable: system.cpu : A0 T0 : @asm_main_after_prologue+16
2500: ExecEnable: system.cpu : A0 T0 : @asm_main_after_prologue+20
3000: ExecEnable: system.cpu : A0 T0 : @asm_main_after_prologue+24
3500: ExecEnable: system.cpu : A0 T0 : @asm_main_after_prologue+28
Change-Id: Ic371ebc8b0827656f1b78fcfd3f28505a5100274
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22007
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/sim')
0 files changed, 0 insertions, 0 deletions