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| author | Gabe Black <gabeblack@google.com> | 2018-10-01 03:59:05 -0700 |
|---|---|---|
| committer | Gabe Black <gabeblack@google.com> | 2018-10-16 00:44:17 +0000 |
| commit | e16ca903f240c750f34207b4c98735f81d2312b8 (patch) | |
| tree | a33efdef5b37d047b40cded3d9bbf00fb0241d1d /src/systemc/ext/channel/sc_signal_rv.hh | |
| parent | b2e1f81f51e630ef4399f24024c82404601f8340 (diff) | |
| download | gem5-e16ca903f240c750f34207b4c98735f81d2312b8.tar.xz | |
systemc: Implement register_port in all the predefined channels.
Something the Accellera implementation does which would be good to do
in the gem5 implementation is to create a base class for sc_signal
which isn't templated, and which holds the common/non-type specific
versions of the various sc_signal methods. This will reduce code
redundancy and binary size, and also let us hide more code in .cc
files so that it's less likely we'd need to recompile model code to
fix a bug.
Also, since this all uses of sc_channel_warn_unimple have now been
eliminated, remove that function.
Change-Id: Ia574647c034e7136093c2047b69de725ac34f52f
Reviewed-on: https://gem5-review.googlesource.com/c/13200
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/systemc/ext/channel/sc_signal_rv.hh')
| -rw-r--r-- | src/systemc/ext/channel/sc_signal_rv.hh | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/src/systemc/ext/channel/sc_signal_rv.hh b/src/systemc/ext/channel/sc_signal_rv.hh index d333da052..1a47e84ad 100644 --- a/src/systemc/ext/channel/sc_signal_rv.hh +++ b/src/systemc/ext/channel/sc_signal_rv.hh @@ -35,7 +35,6 @@ #include "../dt/bit/sc_logic.hh" #include "../dt/bit/sc_lv.hh" #include "sc_signal.hh" -#include "warn_unimpl.hh" namespace sc_dt { @@ -62,11 +61,7 @@ class sc_signal_rv : public sc_signal<sc_dt::sc_lv<W>, SC_MANY_WRITERS> {} virtual ~sc_signal_rv() {} - virtual void - register_port(sc_port_base &, const char *) - { - sc_channel_warn_unimpl(__PRETTY_FUNCTION__); - } + virtual void register_port(sc_port_base &, const char *) {} virtual void write(const sc_dt::sc_lv<W> &l) |