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| author | Adrian Herrera <adrian.herrera@arm.com> | 2019-10-24 12:36:09 +0100 |
|---|---|---|
| committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2020-01-10 15:57:09 +0000 |
| commit | a58e5181d813d7a394f64fc434f0be04c4f67e95 (patch) | |
| tree | a27586907a0ead112eb905583df800b882cd5089 /src/systemc/ext | |
| parent | 1986b77d78e30684b1ca5ac9d9b1c75736f258d6 (diff) | |
| download | gem5-a58e5181d813d7a394f64fc434f0be04c4f67e95.tar.xz | |
dev-arm: VExpress_GEM5_Base, fix daughterboard reference
VExpress_GEM5_Base states that its memory map is based on
CoreTile Express A15x2 A7x3, while the model used for the
Daughterboard Configuration Controller (DCC) is based on
Coretile Express A15x2.
These two daughterboard specifications differ in both on-chip
memory map and DCC clocks as of the TRMs.
This patch makes the reference consistent to Coretile Express
A15x2 and adds several non-confidential references to aid in
understanding the platform and adding new peripherals.
Change-Id: Ia55e7362bdc9ed6509f8eff4cbd7eb38e538d774
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24203
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/systemc/ext')
0 files changed, 0 insertions, 0 deletions