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author | Gabe Black <gabeblack@google.com> | 2018-05-24 01:37:55 -0700 |
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committer | Gabe Black <gabeblack@google.com> | 2018-08-08 10:09:54 +0000 |
commit | 16fa8d7cc8c92f5ab879e4cf9c6c0bbb3567860f (patch) | |
tree | 7b6faaacb4574a555e561534aa4a8508c0624c32 /src/systemc/tests/systemc/bugs/async_reset_init/golden/async_reset_init.log | |
parent | 7235d3b5211d0ba8f528d930a4c1e7ad62eec51a (diff) | |
download | gem5-16fa8d7cc8c92f5ab879e4cf9c6c0bbb3567860f.tar.xz |
systemc: Import tests from the Accellera systemc distribution.
Change-Id: Iad76b398949a55d768a34d027a2d8e3739953da6
Reviewed-on: https://gem5-review.googlesource.com/10845
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/systemc/tests/systemc/bugs/async_reset_init/golden/async_reset_init.log')
-rw-r--r-- | src/systemc/tests/systemc/bugs/async_reset_init/golden/async_reset_init.log | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/src/systemc/tests/systemc/bugs/async_reset_init/golden/async_reset_init.log b/src/systemc/tests/systemc/bugs/async_reset_init/golden/async_reset_init.log new file mode 100644 index 000000000..681bfe511 --- /dev/null +++ b/src/systemc/tests/systemc/bugs/async_reset_init/golden/async_reset_init.log @@ -0,0 +1,30 @@ +SystemC Simulation +Starting simulation ... + 0 s (0): top.method1: reset state + 0 s (0): top.method0: reset state + 0 s (0): top.method0: reset state + 0 s (0): top.thread0: reset state + 0 s (0): top.thread1: reset state + 10 ns (1): top.method1: reset state + 10 ns (1): top.method0: reset state + 10 ns (1): top.thread1: reset state + 10 ns (1): top.thread0: reset state + 30 ns (2): top.method1: running + 30 ns (2): top.method0: running + 30 ns (2): top.thread1: reset done + 30 ns (2): top.thread0: reset done + 40 ns (3): top.method1: running + 40 ns (3): top.method0: running + 40 ns (3): top.thread1: continuing + 40 ns (3): top.thread0: continuing + 50 ns (4): top.method1: reset state + 50 ns (4): top.method0: reset state + 50 ns (4): top.thread0: reset state + 50 ns (4): top.thread1: reset state + 60 ns (5): top.method1: reset state + 60 ns (5): top.method0: reset state + 60 ns (5): top.thread1: reset state + 60 ns (5): top.thread0: reset state +... done. + +Info: /OSCI/SystemC: Simulation stopped by user. |