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authorGabe Black <gabeblack@google.com>2018-05-24 01:37:55 -0700
committerGabe Black <gabeblack@google.com>2018-08-08 10:09:54 +0000
commit16fa8d7cc8c92f5ab879e4cf9c6c0bbb3567860f (patch)
tree7b6faaacb4574a555e561534aa4a8508c0624c32 /src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes
parent7235d3b5211d0ba8f528d930a4c1e7ad62eec51a (diff)
downloadgem5-16fa8d7cc8c92f5ab879e4cf9c6c0bbb3567860f.tar.xz
systemc: Import tests from the Accellera systemc distribution.
Change-Id: Iad76b398949a55d768a34d027a2d8e3739953da6 Reviewed-on: https://gem5-review.googlesource.com/10845 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes')
-rw-r--r--src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/common.h45
-rw-r--r--src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.cpp119
-rw-r--r--src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.f4
-rw-r--r--src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.h102
-rw-r--r--src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/display.cpp60
-rw-r--r--src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/display.h75
-rw-r--r--src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/golden/datatypes.log35
-rw-r--r--src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/main.cpp95
-rw-r--r--src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/stimulus.cpp71
-rw-r--r--src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/stimulus.h78
10 files changed, 684 insertions, 0 deletions
diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/common.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/common.h
new file mode 100644
index 000000000..2a4edbad5
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/common.h
@@ -0,0 +1,45 @@
+/*****************************************************************************
+
+ Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+ more contributor license agreements. See the NOTICE file distributed
+ with this work for additional information regarding copyright ownership.
+ Accellera licenses this file to you under the Apache License, Version 2.0
+ (the "License"); you may not use this file except in compliance with the
+ License. You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ implied. See the License for the specific language governing
+ permissions and limitations under the License.
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ common.h --
+
+ Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ MODIFICATION LOG - modifiers, enter your name, affiliation, date and
+ changes you are making here.
+
+ Name, Affiliation, Date:
+ Description of Modification:
+
+ *****************************************************************************/
+
+#ifndef COMMON_H
+#define COMMON_H
+
+#include "systemc.h"
+
+typedef sc_signal<sc_bv<4> > sc_signal_bool_vector;
+
+#endif
diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.cpp
new file mode 100644
index 000000000..145f7181d
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.cpp
@@ -0,0 +1,119 @@
+/*****************************************************************************
+
+ Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+ more contributor license agreements. See the NOTICE file distributed
+ with this work for additional information regarding copyright ownership.
+ Accellera licenses this file to you under the Apache License, Version 2.0
+ (the "License"); you may not use this file except in compliance with the
+ License. You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ implied. See the License for the specific language governing
+ permissions and limitations under the License.
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ datatypes.cpp --
+
+ Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ MODIFICATION LOG - modifiers, enter your name, affiliation, date and
+ changes you are making here.
+
+ Name, Affiliation, Date:
+ Description of Modification:
+
+ *****************************************************************************/
+
+
+#include "datatypes.h"
+
+void datatypes::entry() {
+
+ sc_biguint<4> tmp1;
+ sc_bigint<4> tmp2;
+ sc_lv<4> tmp3;
+ sc_bv<4> tmp4;
+
+ // reset_loop
+ if (reset.read() == true) {
+ out_value1.write(0);
+ out_value2.write(0);
+ out_value3.write(0);
+ out_value4.write(0);
+ out_valid.write(false);
+ wait();
+ } else wait();
+
+ //
+ // main loop
+ //
+ while(1) {
+ do { wait(); } while (in_valid == false);
+
+ // reading inputs
+ tmp1 = in_value1.read();
+ tmp2 = in_value2.read();
+ tmp3 = in_value3.read();
+ tmp4 = in_value4.read();
+
+ // checking if condition on a range of bits
+ if (tmp1.range(1,3) == 4) {
+ out_value1.write(3);
+ } else if (tmp1.range(3,1) == 4) {
+ out_value1.write(2);
+ } else {
+ out_value1.write(tmp1);
+ };
+ wait();
+
+ // checking if condition on bit part
+ if (tmp2[2]) {
+ out_value2.write(3);
+ } else if ((bool)tmp1[1]==true) {
+ out_value2.write(2);
+ } else {
+ out_value2.write(tmp2);
+ };
+ wait();
+
+ // checking if condition on a range of bits in complex condition
+ if (tmp3.range(1,3)=="000" || ((tmp3.range(3,1).to_uint()!=4) &&
+ tmp3.range(3,1).to_uint()!=5 && tmp3.range(3,1).to_uint()!=6 &&
+ tmp3.range(3,1).to_uint()!=7)) {
+ out_value3.write(1);
+ } else {
+ out_value3.write(tmp3);
+ };
+
+ // checking if condition on a range of bits in complex condition
+ // on signal reads inside condition
+ if (in_value4.read().range(1,3)=="000" ||
+ (in_value4.read().range(3,1).to_uint()!=4 &&
+ in_value4.read().range(3,1).to_uint()!=5 &&
+ in_value4.read().range(3,1).to_uint()!=6 &&
+ in_value4.read().range(3,1).to_uint()!=7)) {
+ out_value4.write(1);
+ } else {
+ out_value4.write(tmp4);
+ };
+
+ out_valid.write(true);
+ wait();
+ out_valid.write(false);
+
+ }
+}
+
+// EOF
+
diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.f b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.f
new file mode 100644
index 000000000..be086769d
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.f
@@ -0,0 +1,4 @@
+datatypes/display.cpp
+datatypes/main.cpp
+datatypes/stimulus.cpp
+datatypes/datatypes.cpp
diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.h
new file mode 100644
index 000000000..43be41785
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.h
@@ -0,0 +1,102 @@
+/*****************************************************************************
+
+ Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+ more contributor license agreements. See the NOTICE file distributed
+ with this work for additional information regarding copyright ownership.
+ Accellera licenses this file to you under the Apache License, Version 2.0
+ (the "License"); you may not use this file except in compliance with the
+ License. You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ implied. See the License for the specific language governing
+ permissions and limitations under the License.
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ datatypes.h --
+
+ Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ MODIFICATION LOG - modifiers, enter your name, affiliation, date and
+ changes you are making here.
+
+ Name, Affiliation, Date:
+ Description of Modification:
+
+ *****************************************************************************/
+
+
+#include "common.h"
+
+SC_MODULE( datatypes )
+{
+ SC_HAS_PROCESS( datatypes );
+
+ sc_in_clk clk;
+
+ const sc_signal<bool>& reset ;
+ const sc_signal_bool_vector& in_value1;
+ const sc_signal_bool_vector& in_value2;
+ const sc_signal_bool_vector& in_value3;
+ const sc_signal_bool_vector& in_value4;
+ const sc_signal<bool>& in_valid;
+ sc_signal_bool_vector& out_value1;
+ sc_signal_bool_vector& out_value2;
+ sc_signal_bool_vector& out_value3;
+ sc_signal_bool_vector& out_value4;
+ sc_signal<bool>& out_valid;
+
+ //
+ // Constructor
+ //
+
+ datatypes(
+ sc_module_name NAME, // referense name
+ sc_clock& CLK, // clock
+ const sc_signal<bool>& RESET,
+ const sc_signal_bool_vector& IN_VALUE1,
+ const sc_signal_bool_vector& IN_VALUE2,
+ const sc_signal_bool_vector& IN_VALUE3,
+ const sc_signal_bool_vector& IN_VALUE4,
+ const sc_signal<bool>& IN_VALID, // Input port
+ sc_signal_bool_vector& OUT_VALUE1,
+ sc_signal_bool_vector& OUT_VALUE2,
+ sc_signal_bool_vector& OUT_VALUE3,
+ sc_signal_bool_vector& OUT_VALUE4,
+ sc_signal<bool>& OUT_VALID // Input port
+ )
+ :
+ reset (RESET),
+ in_value1 (IN_VALUE1),
+ in_value2 (IN_VALUE2),
+ in_value3 (IN_VALUE3),
+ in_value4 (IN_VALUE4),
+ in_valid (IN_VALID),
+ out_value1 (OUT_VALUE1),
+ out_value2 (OUT_VALUE2),
+ out_value3 (OUT_VALUE3),
+ out_value4 (OUT_VALUE4),
+ out_valid (OUT_VALID)
+ {
+ clk (CLK);
+ SC_CTHREAD( entry, clk.pos() );
+ reset_signal_is(reset,true);
+ };
+
+ //
+
+ void entry ();
+
+};
+
+// EOF
diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/display.cpp
new file mode 100644
index 000000000..ceaa882b1
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/display.cpp
@@ -0,0 +1,60 @@
+/*****************************************************************************
+
+ Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+ more contributor license agreements. See the NOTICE file distributed
+ with this work for additional information regarding copyright ownership.
+ Accellera licenses this file to you under the Apache License, Version 2.0
+ (the "License"); you may not use this file except in compliance with the
+ License. You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ implied. See the License for the specific language governing
+ permissions and limitations under the License.
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ display.cpp --
+
+ Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ MODIFICATION LOG - modifiers, enter your name, affiliation, date and
+ changes you are making here.
+
+ Name, Affiliation, Date:
+ Description of Modification:
+
+ *****************************************************************************/
+
+
+#include "display.h"
+
+void display::entry(){
+ int i = 0;
+
+ wait(2);
+ while(1) {
+ // Reading Data, and Counter i,j is counted up.
+ while (in_valid.read()==false) wait();
+ cout << "Display : " << in_data1.read() << " "
+ << in_data2.read() << " "
+ << in_data3.read() << " "
+ << in_data4.read() << " "
+ << " at " << sc_time_stamp() << endl;
+ i++;
+ if(i == 24) sc_stop();
+ wait();
+ }
+}
+
+
+// EOF
diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/display.h
new file mode 100644
index 000000000..3ff6b921c
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/display.h
@@ -0,0 +1,75 @@
+/*****************************************************************************
+
+ Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+ more contributor license agreements. See the NOTICE file distributed
+ with this work for additional information regarding copyright ownership.
+ Accellera licenses this file to you under the Apache License, Version 2.0
+ (the "License"); you may not use this file except in compliance with the
+ License. You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ implied. See the License for the specific language governing
+ permissions and limitations under the License.
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ display.h --
+
+ Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ MODIFICATION LOG - modifiers, enter your name, affiliation, date and
+ changes you are making here.
+
+ Name, Affiliation, Date:
+ Description of Modification:
+
+ *****************************************************************************/
+
+
+#include "common.h"
+
+SC_MODULE( display )
+{
+ SC_HAS_PROCESS( display );
+
+ sc_in_clk clk;
+
+ const sc_signal_bool_vector& in_data1; // Input port
+ const sc_signal_bool_vector& in_data2; // Input port
+ const sc_signal_bool_vector& in_data3; // Input port
+ const sc_signal_bool_vector& in_data4; // Input port
+ const sc_signal<bool>& in_valid;
+
+ display( sc_module_name NAME,
+ sc_clock& CLK,
+ const sc_signal_bool_vector& IN_DATA1,
+ const sc_signal_bool_vector& IN_DATA2,
+ const sc_signal_bool_vector& IN_DATA3,
+ const sc_signal_bool_vector& IN_DATA4,
+ const sc_signal<bool>& IN_VALID
+ )
+ :
+ in_data1(IN_DATA1),
+ in_data2(IN_DATA2),
+ in_data3(IN_DATA3),
+ in_data4(IN_DATA4),
+ in_valid(IN_VALID)
+ {
+ clk(CLK);
+ SC_CTHREAD( entry, clk.pos() );
+ }
+
+ void entry();
+};
+
+// EOF
diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/golden/datatypes.log b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/golden/datatypes.log
new file mode 100644
index 000000000..f183028c3
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/golden/datatypes.log
@@ -0,0 +1,35 @@
+SystemC Simulation
+Stimuli: stim1= 0 stim2= 0 stim3= 0 stim4= 0 2 ns
+Display : 0000 0000 0001 0001 at 6 ns
+Stimuli: stim1= 1 stim2= 1 stim3= 1 stim4= 1 13 ns
+Display : 0001 0001 0001 0001 at 17 ns
+Stimuli: stim1= 2 stim2= 2 stim3= 2 stim4= 2 24 ns
+Display : 0011 0010 0001 0001 at 28 ns
+Stimuli: stim1= 3 stim2= 3 stim3= 3 stim4= 3 35 ns
+Display : 0011 0010 0001 0001 at 39 ns
+Stimuli: stim1= 4 stim2= 4 stim3= 4 stim4= 4 46 ns
+Display : 0100 0011 0001 0001 at 50 ns
+Stimuli: stim1= 5 stim2= 5 stim3= 5 stim4= 5 57 ns
+Display : 0101 0011 0001 0001 at 61 ns
+Stimuli: stim1= 6 stim2= 6 stim3= 6 stim4= 6 68 ns
+Display : 0110 0011 0001 0001 at 72 ns
+Stimuli: stim1= 7 stim2= 7 stim3= 7 stim4= 7 79 ns
+Display : 0111 0011 0001 0001 at 83 ns
+Stimuli: stim1= 8 stim2= 8 stim3= 8 stim4= 8 90 ns
+Display : 0010 1000 1000 1000 at 94 ns
+Stimuli: stim1= 9 stim2= 9 stim3= 9 stim4= 9 101 ns
+Display : 0010 1001 1001 1001 at 105 ns
+Stimuli: stim1= 10 stim2= 10 stim3= 10 stim4= 10 112 ns
+Display : 1010 0010 1010 1010 at 116 ns
+Stimuli: stim1= 11 stim2= 11 stim3= 11 stim4= 11 123 ns
+Display : 1011 0010 1011 1011 at 127 ns
+Stimuli: stim1= 12 stim2= 12 stim3= 12 stim4= 12 134 ns
+Display : 1100 0011 1100 1100 at 138 ns
+Stimuli: stim1= 13 stim2= 13 stim3= 13 stim4= 13 145 ns
+Display : 1101 0011 1101 1101 at 149 ns
+Stimuli: stim1= 14 stim2= 14 stim3= 14 stim4= 14 156 ns
+Display : 1110 0011 1110 1110 at 160 ns
+Stimuli: stim1= 15 stim2= 15 stim3= 15 stim4= 15 167 ns
+Display : 1111 0011 1111 1111 at 171 ns
+
+Info: /OSCI/SystemC: Simulation stopped by user.
diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/main.cpp
new file mode 100644
index 000000000..0eee3db1c
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/main.cpp
@@ -0,0 +1,95 @@
+/*****************************************************************************
+
+ Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+ more contributor license agreements. See the NOTICE file distributed
+ with this work for additional information regarding copyright ownership.
+ Accellera licenses this file to you under the Apache License, Version 2.0
+ (the "License"); you may not use this file except in compliance with the
+ License. You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ implied. See the License for the specific language governing
+ permissions and limitations under the License.
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ main.cpp --
+
+ Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ MODIFICATION LOG - modifiers, enter your name, affiliation, date and
+ changes you are making here.
+
+ Name, Affiliation, Date:
+ Description of Modification:
+
+ *****************************************************************************/
+
+
+#include "datatypes.h"
+#include "stimulus.h"
+#include "display.h"
+
+int sc_main (int argc , char *argv[]) {
+ sc_clock clock;
+ sc_signal<bool> reset;
+ sc_signal_bool_vector stim1;
+ sc_signal_bool_vector stim2;
+ sc_signal_bool_vector stim3;
+ sc_signal_bool_vector stim4;
+ sc_signal<bool> input_valid;
+ sc_signal_bool_vector result1;
+ sc_signal_bool_vector result2;
+ sc_signal_bool_vector result3;
+ sc_signal_bool_vector result4;
+ sc_signal<bool> output_valid;
+
+
+
+ datatypes datatypes1 ( "process_body",
+ clock,
+ reset,
+ stim1,
+ stim2,
+ stim3,
+ stim4,
+ input_valid,
+ result1,
+ result2,
+ result3,
+ result4,
+ output_valid
+ );
+
+ stimulus stimulus1 ("stimulus",
+ clock,
+ reset,
+ stim1,
+ stim2,
+ stim3,
+ stim4,
+ input_valid);
+
+ display display1 ("display",
+ clock,
+ result1,
+ result2,
+ result3,
+ result4,
+ output_valid);
+
+ sc_start();
+ return 0;
+}
+
+// EOF
diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/stimulus.cpp
new file mode 100644
index 000000000..2e897dacc
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/stimulus.cpp
@@ -0,0 +1,71 @@
+/*****************************************************************************
+
+ Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+ more contributor license agreements. See the NOTICE file distributed
+ with this work for additional information regarding copyright ownership.
+ Accellera licenses this file to you under the Apache License, Version 2.0
+ (the "License"); you may not use this file except in compliance with the
+ License. You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ implied. See the License for the specific language governing
+ permissions and limitations under the License.
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ stimulus.cpp --
+
+ Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ MODIFICATION LOG - modifiers, enter your name, affiliation, date and
+ changes you are making here.
+
+ Name, Affiliation, Date:
+ Description of Modification:
+
+ *****************************************************************************/
+
+
+#include "stimulus.h"
+
+void stimulus::entry() {
+
+int i;
+
+ // sending some reset values
+ reset.write(true);
+ stim1.write(0);
+ stim2.write(0);
+ stim3.write(0);
+ stim4.write(0);
+ wait();
+ reset.write(false);
+ wait();
+ for (i=0; i<= 15; i++) {
+ stim1.write(i);
+ stim2.write(i);
+ stim3.write(i);
+ stim4.write(i);
+ input_valid.write(true);
+ cout << "Stimuli: stim1= " << i << " stim2= " << i << " stim3= "
+ << i << " stim4= " << i << " "
+ << sc_time_stamp() << endl;
+ wait();
+ input_valid.write(false);
+ wait(10);
+ }
+
+ sc_stop();
+}
+
+// EOF
diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/stimulus.h
new file mode 100644
index 000000000..a82afff4c
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/stimulus.h
@@ -0,0 +1,78 @@
+/*****************************************************************************
+
+ Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+ more contributor license agreements. See the NOTICE file distributed
+ with this work for additional information regarding copyright ownership.
+ Accellera licenses this file to you under the Apache License, Version 2.0
+ (the "License"); you may not use this file except in compliance with the
+ License. You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ implied. See the License for the specific language governing
+ permissions and limitations under the License.
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ stimulus.h --
+
+ Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ MODIFICATION LOG - modifiers, enter your name, affiliation, date and
+ changes you are making here.
+
+ Name, Affiliation, Date:
+ Description of Modification:
+
+ *****************************************************************************/
+
+
+#include "common.h"
+
+SC_MODULE( stimulus )
+{
+ SC_HAS_PROCESS( stimulus );
+
+ sc_in_clk clk;
+
+ sc_signal<bool>& reset;
+ sc_signal_bool_vector& stim1;
+ sc_signal_bool_vector& stim2;
+ sc_signal_bool_vector& stim3;
+ sc_signal_bool_vector& stim4;
+ sc_signal<bool>& input_valid;
+
+ stimulus(sc_module_name NAME,
+ sc_clock& CLK,
+ sc_signal<bool>& RESET,
+ sc_signal_bool_vector& STIM1,
+ sc_signal_bool_vector& STIM2,
+ sc_signal_bool_vector& STIM3,
+ sc_signal_bool_vector& STIM4,
+ sc_signal<bool>& INPUT_VALID
+ )
+ :
+ reset(RESET),
+ stim1(STIM1),
+ stim2(STIM2),
+ stim3(STIM3),
+ stim4(STIM4),
+ input_valid(INPUT_VALID)
+ {
+ clk(CLK);
+ SC_CTHREAD( entry, clk.pos() );
+ }
+
+ void entry();
+};
+
+// EOF