diff options
author | Gabe Black <gabeblack@google.com> | 2018-05-24 01:37:55 -0700 |
---|---|---|
committer | Gabe Black <gabeblack@google.com> | 2018-08-08 10:09:54 +0000 |
commit | 16fa8d7cc8c92f5ab879e4cf9c6c0bbb3567860f (patch) | |
tree | 7b6faaacb4574a555e561534aa4a8508c0624c32 /src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm | |
parent | 7235d3b5211d0ba8f528d930a4c1e7ad62eec51a (diff) | |
download | gem5-16fa8d7cc8c92f5ab879e4cf9c6c0bbb3567860f.tar.xz |
systemc: Import tests from the Accellera systemc distribution.
Change-Id: Iad76b398949a55d768a34d027a2d8e3739953da6
Reviewed-on: https://gem5-review.googlesource.com/10845
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm')
9 files changed, 734 insertions, 0 deletions
diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/display.cpp new file mode 100644 index 000000000..3e8ba2ec1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/display.cpp @@ -0,0 +1,54 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up.
+ while (out_valid.read()==false) wait(); + cout << "Display : " << result.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/display.h new file mode 100644 index 000000000..b50f526c0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/display.h @@ -0,0 +1,66 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal<int>& result; // Input port + const sc_signal<bool>& out_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal<int>& RESULT, + const sc_signal<bool>& OUT_VALID + ) + : + result(RESULT), + out_valid(OUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/golden/while_fsm.log b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/golden/while_fsm.log new file mode 100644 index 000000000..acee1098d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/golden/while_fsm.log @@ -0,0 +1,183 @@ +SystemC Simulation +Stimuli1 : in_valid = true in_value 1 at 6 ns +Stimuli1 : in_valid = true in_value 2 at 7 ns +Stimuli1 : in_valid = true in_value 3 at 8 ns +Display : 0 at 8 ns +Stimuli1 : in_valid = true in_value 4 at 9 ns +Display : 2 at 9 ns +Stimuli1 : in_valid = true in_value 5 at 10 ns +Display : 3 at 10 ns +Stimuli1 : in_valid = true in_value 6 at 11 ns +Display : 4 at 11 ns +Stimuli1 : in_valid = true in_value 7 at 12 ns +Display : 5 at 12 ns +Stimuli1 : in_valid = true in_value 8 at 13 ns +Display : 6 at 13 ns +Stimuli1 : in_valid = true in_value 9 at 14 ns +Display : 7 at 14 ns +Stimuli1 : in_valid = true in_value 10 at 15 ns +Display : 8 at 15 ns +Display : 9 at 16 ns +Display : 10 at 17 ns +Display : 10 at 18 ns +Stimuli2 : in_valid = true in_value 1 at 20 ns +Display : 10 at 20 ns +Stimuli2 : in_valid = true in_value 2 at 21 ns +Display : 10 at 21 ns +Stimuli2 : in_valid = true in_value 3 at 22 ns +Display : 10 at 22 ns +Stimuli2 : in_valid = true in_value 4 at 23 ns +Display : 10 at 23 ns +Stimuli2 : in_valid = true in_value 5 at 24 ns +Display : 10 at 24 ns +Stimuli2 : in_valid = true in_value 6 at 25 ns +Display : 10 at 25 ns +Stimuli2 : in_valid = true in_value 7 at 26 ns +Display : 5 at 26 ns +Stimuli2 : in_valid = true in_value 8 at 27 ns +Display : 6 at 27 ns +Stimuli2 : in_valid = true in_value 9 at 28 ns +Display : 6 at 28 ns +Stimuli2 : in_valid = true in_value 10 at 29 ns +Display : 8 at 29 ns +Display : 9 at 30 ns +Display : 10 at 31 ns +Stimuli3 : in_valid = true in_value 1 at 34 ns +Stimuli3 : in_valid = true in_value 2 at 35 ns +Stimuli3 : in_valid = true in_value 3 at 36 ns +Display : 10 at 36 ns +Stimuli3 : in_valid = true in_value 4 at 37 ns +Display : 2 at 37 ns +Stimuli3 : in_valid = true in_value 5 at 38 ns +Display : 3 at 38 ns +Stimuli3 : in_valid = true in_value 6 at 39 ns +Display : 4 at 39 ns +Stimuli3 : in_valid = true in_value 7 at 40 ns +Display : 5 at 40 ns +Stimuli3 : in_valid = true in_value 8 at 41 ns +Display : 6 at 41 ns +Stimuli3 : in_valid = true in_value 9 at 42 ns +Display : 6 at 42 ns +Stimuli3 : in_valid = true in_value 10 at 43 ns +Stimuli1 : in_valid = true in_value 1 at 54 ns +Stimuli1 : in_valid = true in_value 2 at 55 ns +Stimuli1 : in_valid = true in_value 3 at 56 ns +Display : 6 at 56 ns +Stimuli1 : in_valid = true in_value 4 at 57 ns +Display : 2 at 57 ns +Stimuli1 : in_valid = true in_value 5 at 58 ns +Display : 3 at 58 ns +Stimuli1 : in_valid = true in_value 6 at 59 ns +Display : 4 at 59 ns +Stimuli1 : in_valid = true in_value 7 at 60 ns +Display : 5 at 60 ns +Stimuli1 : in_valid = true in_value 8 at 61 ns +Display : 6 at 61 ns +Stimuli1 : in_valid = true in_value 9 at 62 ns +Display : 7 at 62 ns +Stimuli1 : in_valid = true in_value 10 at 63 ns +Display : 8 at 63 ns +Display : 9 at 64 ns +Display : 10 at 65 ns +Display : 10 at 66 ns +Stimuli2 : in_valid = true in_value 1 at 68 ns +Display : 10 at 68 ns +Stimuli2 : in_valid = true in_value 2 at 69 ns +Display : 10 at 69 ns +Stimuli2 : in_valid = true in_value 3 at 70 ns +Display : 10 at 70 ns +Stimuli2 : in_valid = true in_value 4 at 71 ns +Display : 10 at 71 ns +Stimuli2 : in_valid = true in_value 5 at 72 ns +Display : 10 at 72 ns +Stimuli2 : in_valid = true in_value 6 at 73 ns +Display : 10 at 73 ns +Stimuli2 : in_valid = true in_value 7 at 74 ns +Display : 5 at 74 ns +Stimuli2 : in_valid = true in_value 8 at 75 ns +Display : 6 at 75 ns +Stimuli2 : in_valid = true in_value 9 at 76 ns +Display : 6 at 76 ns +Stimuli2 : in_valid = true in_value 10 at 77 ns +Display : 8 at 77 ns +Display : 9 at 78 ns +Display : 10 at 79 ns +Stimuli3 : in_valid = true in_value 1 at 82 ns +Stimuli3 : in_valid = true in_value 2 at 83 ns +Stimuli3 : in_valid = true in_value 3 at 84 ns +Display : 10 at 84 ns +Stimuli3 : in_valid = true in_value 4 at 85 ns +Display : 2 at 85 ns +Stimuli3 : in_valid = true in_value 5 at 86 ns +Display : 3 at 86 ns +Stimuli3 : in_valid = true in_value 6 at 87 ns +Display : 4 at 87 ns +Stimuli3 : in_valid = true in_value 7 at 88 ns +Display : 5 at 88 ns +Stimuli3 : in_valid = true in_value 8 at 89 ns +Display : 6 at 89 ns +Stimuli3 : in_valid = true in_value 9 at 90 ns +Display : 6 at 90 ns +Stimuli3 : in_valid = true in_value 10 at 91 ns +Stimuli1 : in_valid = true in_value 1 at 102 ns +Stimuli1 : in_valid = true in_value 2 at 103 ns +Stimuli1 : in_valid = true in_value 3 at 104 ns +Display : 6 at 104 ns +Stimuli1 : in_valid = true in_value 4 at 105 ns +Display : 2 at 105 ns +Stimuli1 : in_valid = true in_value 5 at 106 ns +Display : 3 at 106 ns +Stimuli1 : in_valid = true in_value 6 at 107 ns +Display : 4 at 107 ns +Stimuli1 : in_valid = true in_value 7 at 108 ns +Display : 5 at 108 ns +Stimuli1 : in_valid = true in_value 8 at 109 ns +Display : 6 at 109 ns +Stimuli1 : in_valid = true in_value 9 at 110 ns +Display : 7 at 110 ns +Stimuli1 : in_valid = true in_value 10 at 111 ns +Display : 8 at 111 ns +Display : 9 at 112 ns +Display : 10 at 113 ns +Display : 10 at 114 ns +Stimuli2 : in_valid = true in_value 1 at 116 ns +Display : 10 at 116 ns +Stimuli2 : in_valid = true in_value 2 at 117 ns +Display : 10 at 117 ns +Stimuli2 : in_valid = true in_value 3 at 118 ns +Display : 10 at 118 ns +Stimuli2 : in_valid = true in_value 4 at 119 ns +Display : 10 at 119 ns +Stimuli2 : in_valid = true in_value 5 at 120 ns +Display : 10 at 120 ns +Stimuli2 : in_valid = true in_value 6 at 121 ns +Display : 10 at 121 ns +Stimuli2 : in_valid = true in_value 7 at 122 ns +Display : 5 at 122 ns +Stimuli2 : in_valid = true in_value 8 at 123 ns +Display : 6 at 123 ns +Stimuli2 : in_valid = true in_value 9 at 124 ns +Display : 6 at 124 ns +Stimuli2 : in_valid = true in_value 10 at 125 ns +Display : 8 at 125 ns +Display : 9 at 126 ns +Display : 10 at 127 ns +Stimuli3 : in_valid = true in_value 1 at 130 ns +Stimuli3 : in_valid = true in_value 2 at 131 ns +Stimuli3 : in_valid = true in_value 3 at 132 ns +Display : 10 at 132 ns +Stimuli3 : in_valid = true in_value 4 at 133 ns +Display : 2 at 133 ns +Stimuli3 : in_valid = true in_value 5 at 134 ns +Display : 3 at 134 ns +Stimuli3 : in_valid = true in_value 6 at 135 ns +Display : 4 at 135 ns +Stimuli3 : in_valid = true in_value 7 at 136 ns +Display : 5 at 136 ns +Stimuli3 : in_valid = true in_value 8 at 137 ns +Display : 6 at 137 ns +Stimuli3 : in_valid = true in_value 9 at 138 ns +Display : 6 at 138 ns +Stimuli3 : in_valid = true in_value 10 at 139 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/main.cpp new file mode 100644 index 000000000..69ab12ad6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/main.cpp @@ -0,0 +1,82 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "while_fsm.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal<bool> reset; + sc_signal<bool> out_valid; + sc_signal<bool> in_valid; + sc_signal<int> result; + sc_signal<int> in_value; + + + while_fsm while_fsm1 ( + "process_body", + clock, + reset, + in_valid, + in_value, + out_valid, + result + ); + + stimulus stimulus1 ( + "stimulus", + clock, + reset, + in_value, + in_valid + ); + + display display1 ( + "display", + clock, + result, + out_valid + ); + + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/stimulus.cpp new file mode 100644 index 000000000..61049e207 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/stimulus.cpp @@ -0,0 +1,82 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-29 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + int i, j; + + // sending some reset values + reset.write(true); + in_valid.write(false); + in_value.write(0); + wait(); + reset.write(false); + wait(5); + for(i=0; i<3; i++){ + in_valid.write(true); + for(j=1; j<=10; j++) { + in_value.write(j); + cout << "Stimuli1 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + in_valid.write(false); + wait(4); + for(j=1; j<=10; j++) { + in_value.write(j); + cout << "Stimuli2 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + wait(4); + for(j=1; j<=10; j++) { + in_value.write(j); + cout << "Stimuli3 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + wait(10); + }; + + wait(15); + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/stimulus.h new file mode 100644 index 000000000..e20114c36 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/stimulus.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal<bool>& reset; + sc_signal<int>& in_value; + sc_signal<bool>& in_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal<bool>& RESET, + sc_signal<int>& IN_VALUE, + sc_signal<bool>& IN_VALID + ) + : + reset (RESET), + in_value (IN_VALUE), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.cpp new file mode 100644 index 000000000..a3f08d992 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.cpp @@ -0,0 +1,120 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + while_fsm.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-29 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "while_fsm.h" + +#define max 10 + +void while_fsm::entry() +{ + + int i, inp_tmp; + + // reset_loop + if (reset.read()==true) { + result.write(0); + out_valid.write(false); + wait(); + } else wait(); + + //---------- + // main loop + //---------- + while(1) { + + // read inputs + while (in_valid.read()==false) wait(); + + // execution of for loop + out_valid.write(true); + i=1; + wait(); + while (i<=max) { + inp_tmp = in_value.read(); + result.write(inp_tmp); + i++; + wait(); + }; + out_valid.write(false); + wait(); + + // execution of for loop with continues + out_valid.write(true); + i=0; + wait(); + do { + i++; + inp_tmp = in_value.read(); + if (i==8) { + wait(); + continue; + } else if (in_value.read()<5 && i!=1) { + wait(); + continue; + } else { + result.write(inp_tmp); + wait(); + } + } while (i<=max); + out_valid.write(false); + wait(); + wait(3); + + // for loop with break + out_valid.write(true); + i=0; + wait(); + do { + i++; + inp_tmp = in_value.read(); + if (inp_tmp==7) { + wait(); + break; + } else { + result.write(inp_tmp); + wait(); + }; + } while (i<=max); + out_valid.write(false); + wait(); + + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.f b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.f new file mode 100644 index 000000000..e47e026a1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.f @@ -0,0 +1,4 @@ +while_fsm/main.cpp +while_fsm/stimulus.cpp +while_fsm/display.cpp +while_fsm/while_fsm.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.h new file mode 100644 index 000000000..75fd0080c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.h @@ -0,0 +1,74 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + while_fsm.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( while_fsm ) +{ + SC_HAS_PROCESS( while_fsm ); + + sc_in_clk clk; + + const sc_signal<bool>& reset; + const sc_signal<bool>& in_valid; + const sc_signal<int>& in_value; + sc_signal<bool>& out_valid; + sc_signal<int>& result; + + while_fsm( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal<bool>& RESET, + const sc_signal<bool>& IN_VALID, + const sc_signal<int>& IN_VALUE, + sc_signal<bool>& OUT_VALID, + sc_signal<int>& RESULT + ) + : + reset (RESET), + in_valid (IN_VALID), + in_value (IN_VALUE), + out_valid (OUT_VALID), + result (RESULT) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + void entry (); +}; |