diff options
author | Gabe Black <gabeblack@google.com> | 2018-05-24 01:37:55 -0700 |
---|---|---|
committer | Gabe Black <gabeblack@google.com> | 2018-08-08 10:09:54 +0000 |
commit | 16fa8d7cc8c92f5ab879e4cf9c6c0bbb3567860f (patch) | |
tree | 7b6faaacb4574a555e561534aa4a8508c0624c32 /src/systemc/tests/systemc/misc/communication/reslv | |
parent | 7235d3b5211d0ba8f528d930a4c1e7ad62eec51a (diff) | |
download | gem5-16fa8d7cc8c92f5ab879e4cf9c6c0bbb3567860f.tar.xz |
systemc: Import tests from the Accellera systemc distribution.
Change-Id: Iad76b398949a55d768a34d027a2d8e3739953da6
Reviewed-on: https://gem5-review.googlesource.com/10845
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/systemc/tests/systemc/misc/communication/reslv')
16 files changed, 1427 insertions, 0 deletions
diff --git a/src/systemc/tests/systemc/misc/communication/reslv/test1/golden/test1.log b/src/systemc/tests/systemc/misc/communication/reslv/test1/golden/test1.log new file mode 100644 index 000000000..298c904fe --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/test1/golden/test1.log @@ -0,0 +1,26 @@ +SystemC Simulation +P1: Set to Z +P2: Set to 0 +Value on Bus = X +Value on Bus = 0 +P1: Set to 1 +P2: Set to Z +Value on Bus = 1 +P1: Set to Z +P2: Set to 0 +Value on Bus = 0 +P1: Set to 1 +P2: Set to Z +Value on Bus = 1 +P1: Set to Z +P2: Set to 0 +Value on Bus = 0 +P1: Set to 1 +P2: Set to Z +Value on Bus = 1 +P1: Set to Z +P2: Set to 0 +Value on Bus = 0 +P1: Set to 1 +P2: Set to Z +Value on Bus = 1 diff --git a/src/systemc/tests/systemc/misc/communication/reslv/test1/test1.cpp b/src/systemc/tests/systemc/misc/communication/reslv/test1/test1.cpp new file mode 100644 index 000000000..9af5f4ddf --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/test1/test1.cpp @@ -0,0 +1,149 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_signal_resolved& out; + sc_in<bool> in; + + proc1( sc_module_name n, + sc_signal_resolved& OUT_, + sc_signal<bool>& IN_ ) + : out(OUT_) + { + in(IN_); + SC_METHOD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc1::entry() +{ + if ((bool) in == true) { + cout << "P1: Set to 1" << endl; + out = SC_LOGIC_1;//'1'; + } + else { + cout << "P1: Set to Z" << endl; + out = SC_LOGIC_Z;//'Z'; + } +} + + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_signal_resolved& out; + sc_in<bool> in; + + proc2( sc_module_name n, + sc_signal_resolved& OUT_, + sc_signal<bool>& IN_ ) + : out(OUT_) + { + in(IN_); + SC_METHOD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc2::entry() +{ + if ((bool) in == false) { + cout << "P2: Set to 0" << endl; + out = SC_LOGIC_0;//'0'; + } + else { + cout << "P2: Set to Z" << endl; + out = SC_LOGIC_Z;//'Z'; + } +} + +SC_MODULE( proc3 ) +{ + SC_HAS_PROCESS( proc3 ); + + const sc_signal_resolved& in; + + proc3( sc_module_name n, + const sc_signal_resolved& IN_ ) + : in(IN_) + { + SC_METHOD( entry ); + sensitive << in; + } + + void entry() + { + sc_logic v; + v = in; + cout << "Value on Bus = " << v.to_char() << endl; + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_signal_resolved Bus; + sc_signal<bool> clock; + + proc1 P1("P1", Bus, clock); + proc2 P2("P2", Bus, clock); + proc3 P3("P3", Bus); + + sc_start(1, SC_NS); + clock = 1; + sc_start(10, SC_NS); + for (int i = 0; i < 3; i++) { + clock = 0; + sc_start(10, SC_NS); + clock = 1; + sc_start(10, SC_NS); + } + return 0; +} + diff --git a/src/systemc/tests/systemc/misc/communication/reslv/test2/golden/test2.log b/src/systemc/tests/systemc/misc/communication/reslv/test2/golden/test2.log new file mode 100644 index 000000000..659987cb8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/test2/golden/test2.log @@ -0,0 +1,25 @@ +SystemC Simulation +P1: Set to 1 +P2: Set to 0 +Value on Bus = X +P1: Set to Z +P2: Set to Z +Value on Bus = Z +P1: Set to 1 +P2: Set to 0 +Value on Bus = X +P1: Set to Z +P2: Set to Z +Value on Bus = Z +P1: Set to 1 +P2: Set to 0 +Value on Bus = X +P1: Set to Z +P2: Set to Z +Value on Bus = Z +P1: Set to 1 +P2: Set to 0 +Value on Bus = X +P1: Set to Z +P2: Set to Z +Value on Bus = Z diff --git a/src/systemc/tests/systemc/misc/communication/reslv/test2/test2.cpp b/src/systemc/tests/systemc/misc/communication/reslv/test2/test2.cpp new file mode 100644 index 000000000..6caf44f92 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/test2/test2.cpp @@ -0,0 +1,149 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_signal_resolved& out; + sc_in<bool> in; + + proc1( sc_module_name n, + sc_signal_resolved& OUT_, + sc_signal<bool>& IN_ ) + : out(OUT_) + { + in(IN_); + SC_METHOD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc1::entry() +{ + if ((bool) in == false) { + cout << "P1: Set to 1" << endl; + out = SC_LOGIC_1;//'1'; + } + else { + cout << "P1: Set to Z" << endl; + out = SC_LOGIC_Z;//'Z'; + } +} + + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_signal_resolved& out; + sc_in<bool> in; + + proc2( sc_module_name n, + sc_signal_resolved& OUT_, + sc_signal<bool>& IN_ ) + : out(OUT_) + { + in(IN_); + SC_METHOD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc2::entry() +{ + if ((bool) in == false) { + cout << "P2: Set to 0" << endl; + out = SC_LOGIC_0;//'0'; + } + else { + cout << "P2: Set to Z" << endl; + out = SC_LOGIC_Z;//'Z'; + } +} + +SC_MODULE( proc3 ) +{ + SC_HAS_PROCESS( proc3 ); + + const sc_signal_resolved& in; + + proc3( sc_module_name n, + const sc_signal_resolved& IN_ ) + : in(IN_) + { + SC_METHOD( entry ); + sensitive << in; + } + + void entry() + { + sc_logic v; + v = in; + cout << "Value on Bus = " << v.to_char() << endl; + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_signal_resolved Bus; + sc_signal<bool> clock; + + proc1 P1("P1", Bus, clock); + proc2 P2("P2", Bus, clock); + proc3 P3("P3", Bus); + + sc_start(0, SC_NS); + clock = 1; + sc_start(10, SC_NS); + for (int i = 0; i < 3; i++) { + clock = 0; + sc_start(10, SC_NS); + clock = 1; + sc_start(10, SC_NS); + } + return 0; +} + diff --git a/src/systemc/tests/systemc/misc/communication/reslv/test3/golden/test3.log b/src/systemc/tests/systemc/misc/communication/reslv/test3/golden/test3.log new file mode 100644 index 000000000..05143f90f --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/test3/golden/test3.log @@ -0,0 +1,19 @@ +SystemC Simulation +P1: Set to Z +P2: Set to 1 +Value on Bus = X +Value on Bus = 1 +P1: Set to 1 +P2: Set to Z +P1: Set to Z +P2: Set to 1 +P1: Set to 1 +P2: Set to Z +P1: Set to Z +P2: Set to 1 +P1: Set to 1 +P2: Set to Z +P1: Set to Z +P2: Set to 1 +P1: Set to 1 +P2: Set to Z diff --git a/src/systemc/tests/systemc/misc/communication/reslv/test3/test3.cpp b/src/systemc/tests/systemc/misc/communication/reslv/test3/test3.cpp new file mode 100644 index 000000000..c173895f7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/test3/test3.cpp @@ -0,0 +1,150 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test3.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_signal_resolved& out; + sc_in<bool> in; + + proc1( sc_module_name n, + sc_signal_resolved& OUT_, + sc_signal<bool>& IN_ ) + : out(OUT_) + { + in(IN_); + SC_METHOD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc1::entry() +{ + if ((bool) in == true) { + cout << "P1: Set to 1" << endl; + out = SC_LOGIC_1;//'1'; + } + else { + cout << "P1: Set to Z" << endl; + out = SC_LOGIC_Z;//'Z'; + } +} + + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_signal_resolved& out; + sc_in<bool> in; + + proc2( sc_module_name n, + sc_signal_resolved& OUT_, + sc_signal<bool>& IN_ ) + : out(OUT_) + { + in(IN_); + SC_METHOD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc2::entry() +{ + if ((bool) in == false) { + cout << "P2: Set to 1" << endl; + out = SC_LOGIC_1;//'1'; + } + else { + cout << "P2: Set to Z" << endl; + out = SC_LOGIC_Z;//'Z'; + } +} + +SC_MODULE( proc3 ) +{ + SC_HAS_PROCESS( proc3 ); + + const sc_signal_resolved& in; + + proc3( sc_module_name n, + const sc_signal_resolved& IN_ ) + : in(IN_) + { + SC_METHOD( entry ); + sensitive << in; + } + + void entry() + { + sc_logic v; + v = in; + cout << "Value on Bus = " << v.to_char() << endl; + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_signal_resolved Bus; + sc_signal<bool> clock; + + proc1 P1("P1", Bus, clock); + proc2 P2("P2", Bus, clock); + proc3 P3("P3", Bus); + + sc_start(1, SC_NS); + clock = 1; + sc_start(10, SC_NS); + for (int i = 0; i < 3; i++) { + clock = 0; + sc_start(10, SC_NS); + clock = 1; + sc_start(10, SC_NS); + } + return 0; +} + diff --git a/src/systemc/tests/systemc/misc/communication/reslv/test4/golden/test4.log b/src/systemc/tests/systemc/misc/communication/reslv/test4/golden/test4.log new file mode 100644 index 000000000..430c155cb --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/test4/golden/test4.log @@ -0,0 +1,23 @@ +SystemC Simulation +Value on Bus = X +P1: Set to 1 +P2: Set to Z +Value on Bus = 1 +P1: Set to Z +P2: Set to 0 +Value on Bus = 0 +P1: Set to 1 +P2: Set to Z +Value on Bus = 1 +P1: Set to Z +P2: Set to 0 +Value on Bus = 0 +P1: Set to 1 +P2: Set to Z +Value on Bus = 1 +P1: Set to Z +P2: Set to 0 +Value on Bus = 0 +P1: Set to 1 +P2: Set to Z +Value on Bus = 1 diff --git a/src/systemc/tests/systemc/misc/communication/reslv/test4/test4.cpp b/src/systemc/tests/systemc/misc/communication/reslv/test4/test4.cpp new file mode 100644 index 000000000..7e98a158a --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/test4/test4.cpp @@ -0,0 +1,158 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test4.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_signal_resolved& out; + sc_in<bool> in; + + proc1( sc_module_name n, + sc_signal_resolved& OUT_, + sc_signal<bool>& IN_ ) + : out(OUT_) + { + in(IN_); + SC_THREAD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc1::entry() +{ + wait(); + while (true) { + if ((bool) in == true) { + cout << "P1: Set to 1" << endl; + out = SC_LOGIC_1;//'1'; + } + else { + cout << "P1: Set to Z" << endl; + out = SC_LOGIC_Z;//'Z'; + } + wait(); + } +} + + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_signal_resolved& out; + sc_in<bool> in; + + proc2( sc_module_name n, + sc_signal_resolved& OUT_, + sc_signal<bool>& IN_ ) + : out(OUT_) + { + in(IN_); + SC_THREAD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc2::entry() +{ + wait(); + while (true) { + if ((bool) in == false) { + cout << "P2: Set to 0" << endl; + out = SC_LOGIC_0;//'0'; + } + else { + cout << "P2: Set to Z" << endl; + out = SC_LOGIC_Z;//'Z'; + } + wait(); + } +} + +SC_MODULE( proc3 ) +{ + SC_HAS_PROCESS( proc3 ); + + const sc_signal_resolved& in; + + proc3( sc_module_name n, + const sc_signal_resolved& IN_ ) + : in(IN_) + { + SC_METHOD( entry ); + sensitive << in; + } + + void entry() + { + sc_logic v; + v = in; + cout << "Value on Bus = " << v.to_char() << endl; + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_signal_resolved Bus; + sc_signal<bool> clock; + + proc1 P1("P1", Bus, clock); + proc2 P2("P2", Bus, clock); + proc3 P3("P3", Bus); + + sc_start(0, SC_NS); + clock = 1; + sc_start(10, SC_NS); + for (int i = 0; i < 3; i++) { + clock = 0; + sc_start(10, SC_NS); + clock = 1; + sc_start(10, SC_NS); + } + return 0; +} + diff --git a/src/systemc/tests/systemc/misc/communication/reslv/tvec1/golden/tvec1.log b/src/systemc/tests/systemc/misc/communication/reslv/tvec1/golden/tvec1.log new file mode 100644 index 000000000..2aa2aebad --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/tvec1/golden/tvec1.log @@ -0,0 +1,26 @@ +SystemC Simulation +P1: Set to Z +P2: Set to 0 +Value on Bus = XX +Value on Bus = 00 +P1: Set to 1 +P2: Set to Z +Value on Bus = 11 +P1: Set to Z +P2: Set to 0 +Value on Bus = 00 +P1: Set to 1 +P2: Set to Z +Value on Bus = 11 +P1: Set to Z +P2: Set to 0 +Value on Bus = 00 +P1: Set to 1 +P2: Set to Z +Value on Bus = 11 +P1: Set to Z +P2: Set to 0 +Value on Bus = 00 +P1: Set to 1 +P2: Set to Z +Value on Bus = 11 diff --git a/src/systemc/tests/systemc/misc/communication/reslv/tvec1/tvec1.cpp b/src/systemc/tests/systemc/misc/communication/reslv/tvec1/tvec1.cpp new file mode 100644 index 000000000..3ff091a66 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/tvec1/tvec1.cpp @@ -0,0 +1,159 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tvec1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +typedef sc_signal_rv<2> sc_signal_resolved_vector; + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_signal_resolved_vector& out; + sc_in<bool> in; + + proc1( sc_module_name n, + sc_signal_resolved_vector& OUT_, + sc_signal<bool>& IN_ ) + : out(OUT_) + { + in(IN_); + SC_METHOD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc1::entry() +{ + sc_lv<2> a; + + if ((bool) in == true) { + cout << "P1: Set to 1" << endl; + a[0] = a[1] = '1'; + out = a; + } + else { + cout << "P1: Set to Z" << endl; + a[0] = a[1] = 'Z'; + out = a; + } +} + + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_signal_resolved_vector& out; + sc_in<bool> in; + + proc2( sc_module_name n, + sc_signal_resolved_vector& OUT_, + sc_signal<bool>& IN_ ) + : out(OUT_) + { + in(IN_); + SC_METHOD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc2::entry() +{ + sc_lv<2> a; + + if ((bool) in == false) { + cout << "P2: Set to 0" << endl; + a[0] = a[1] = '0'; + out = a; + } + else { + cout << "P2: Set to Z" << endl; + a[0] = a[1] = 'Z'; + out = a; + } +} + +SC_MODULE( proc3 ) +{ + SC_HAS_PROCESS( proc3 ); + + const sc_signal_resolved_vector& in; + + proc3( sc_module_name n, + const sc_signal_resolved_vector& IN_ ) + : in(IN_) + { + SC_METHOD( entry ); + sensitive << in; + } + + void entry() + { + sc_lv<2> v; + v = in; + cout << "Value on Bus = " << v.to_string().c_str() << endl; + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_signal_resolved_vector Bus; + sc_signal<bool> clock; + + proc1 P1("P1", Bus, clock); + proc2 P2("P2", Bus, clock); + proc3 P3("P3", Bus); + + sc_start(1, SC_NS); + clock = 1; + sc_start(10, SC_NS); + for (int i = 0; i < 3; i++) { + clock = 0; + sc_start(10, SC_NS); + clock = 1; + sc_start(10, SC_NS); + } + return 0; +} + diff --git a/src/systemc/tests/systemc/misc/communication/reslv/tvec2/golden/tvec2.log b/src/systemc/tests/systemc/misc/communication/reslv/tvec2/golden/tvec2.log new file mode 100644 index 000000000..28298d76a --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/tvec2/golden/tvec2.log @@ -0,0 +1,25 @@ +SystemC Simulation +P1: Set to 1 +P2: Set to 0 +Value on Bus = XX +P1: Set to Z +P2: Set to Z +Value on Bus = ZZ +P1: Set to 1 +P2: Set to 0 +Value on Bus = XX +P1: Set to Z +P2: Set to Z +Value on Bus = ZZ +P1: Set to 1 +P2: Set to 0 +Value on Bus = XX +P1: Set to Z +P2: Set to Z +Value on Bus = ZZ +P1: Set to 1 +P2: Set to 0 +Value on Bus = XX +P1: Set to Z +P2: Set to Z +Value on Bus = ZZ diff --git a/src/systemc/tests/systemc/misc/communication/reslv/tvec2/tvec2.cpp b/src/systemc/tests/systemc/misc/communication/reslv/tvec2/tvec2.cpp new file mode 100644 index 000000000..01ae9ce94 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/tvec2/tvec2.cpp @@ -0,0 +1,157 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tvec2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +typedef sc_signal_rv<2> sc_signal_resolved_vector; + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_signal_resolved_vector& out; + sc_in<bool> in; + + proc1( sc_module_name n, + sc_signal_resolved_vector& OUT_, + sc_signal<bool>& IN_ ) + : out(OUT_) + { + in(IN_); + SC_METHOD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc1::entry() +{ + sc_lv<2> a; + if ((bool) in == false) { + cout << "P1: Set to 1" << endl; + a = "11"; + out = a; + } + else { + cout << "P1: Set to Z" << endl; + a = "ZZ"; + out = a; + } +} + + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_signal_resolved_vector& out; + sc_in<bool> in; + + proc2( sc_module_name n, + sc_signal_resolved_vector& OUT_, + sc_signal<bool>& IN_ ) + : out(OUT_) + { + in(IN_); + SC_METHOD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc2::entry() +{ + sc_lv<2> a; + if ((bool) in == false) { + cout << "P2: Set to 0" << endl; + a = "00"; + out = a; + } + else { + cout << "P2: Set to Z" << endl; + a = "ZZ"; + out = a; + } +} + +SC_MODULE( proc3 ) +{ + SC_HAS_PROCESS( proc3 ); + + const sc_signal_resolved_vector& in; + + proc3( sc_module_name n, + const sc_signal_resolved_vector& IN_ ) + : in(IN_) + { + SC_METHOD( entry ); + sensitive << in; + } + + void entry() + { + sc_lv<2> v; + v = in; + cout << "Value on Bus = " << v.to_string().c_str() << endl; + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_signal_resolved_vector Bus; + sc_signal<bool> clock; + + proc1 P1("P1", Bus, clock); + proc2 P2("P2", Bus, clock); + proc3 P3("P3", Bus); + + sc_start(0, SC_NS); + clock = 1; + sc_start(10, SC_NS); + for (int i = 0; i < 3; i++) { + clock = 0; + sc_start(10, SC_NS); + clock = 1; + sc_start(10, SC_NS); + } + return 0; +} + diff --git a/src/systemc/tests/systemc/misc/communication/reslv/tvec3/golden/tvec3.log b/src/systemc/tests/systemc/misc/communication/reslv/tvec3/golden/tvec3.log new file mode 100644 index 000000000..d6d4b9f94 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/tvec3/golden/tvec3.log @@ -0,0 +1,19 @@ +SystemC Simulation +P1: Set to Z +P2: Set to 1 +Value on Bus = XXX +Value on Bus = 111 +P1: Set to 1 +P2: Set to Z +P1: Set to Z +P2: Set to 1 +P1: Set to 1 +P2: Set to Z +P1: Set to Z +P2: Set to 1 +P1: Set to 1 +P2: Set to Z +P1: Set to Z +P2: Set to 1 +P1: Set to 1 +P2: Set to Z diff --git a/src/systemc/tests/systemc/misc/communication/reslv/tvec3/tvec3.cpp b/src/systemc/tests/systemc/misc/communication/reslv/tvec3/tvec3.cpp new file mode 100644 index 000000000..ab61ddfbc --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/tvec3/tvec3.cpp @@ -0,0 +1,157 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tvec3.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +typedef sc_signal_rv<3> sc_signal_resolved_vector; + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_signal_resolved_vector& out; + sc_in<bool> in; + + proc1( sc_module_name n, + sc_signal_resolved_vector& OUT_, + sc_signal<bool>& IN_ ) + : out(OUT_) + { + in(IN_); + SC_METHOD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc1::entry() +{ + sc_lv<3> a; + if ((bool) in == true) { + cout << "P1: Set to 1" << endl; + a = "111"; + out = a; + } + else { + cout << "P1: Set to Z" << endl; + a = "ZZZ"; + out = a; + } +} + + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_signal_resolved_vector& out; + sc_in<bool> in; + + proc2( sc_module_name n, + sc_signal_resolved_vector& OUT_, + sc_signal<bool>& IN_ ) + : out(OUT_) + { + in(IN_); + SC_METHOD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc2::entry() +{ + sc_lv<3> a; + if ((bool) in == false) { + cout << "P2: Set to 1" << endl; + a = "111"; + out = a; + } + else { + cout << "P2: Set to Z" << endl; + a = "ZZZ"; + out = a; + } +} + +SC_MODULE( proc3 ) +{ + SC_HAS_PROCESS( proc3 ); + + const sc_signal_resolved_vector& in; + + proc3( sc_module_name n, + const sc_signal_resolved_vector& IN_ ) + : in(IN_) + { + SC_METHOD( entry ); + sensitive << in; + } + + void entry() + { + sc_lv<3> v; + v = in; + cout << "Value on Bus = " << v.to_string().c_str() << endl; + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_signal_resolved_vector Bus; + sc_signal<bool> clock; + + proc1 P1("P1", Bus, clock); + proc2 P2("P2", Bus, clock); + proc3 P3("P3", Bus); + + sc_start(1, SC_NS); + clock = 1; + sc_start(10, SC_NS); + for (int i = 0; i < 3; i++) { + clock = 0; + sc_start(10, SC_NS); + clock = 1; + sc_start(10, SC_NS); + } + return 0; +} + diff --git a/src/systemc/tests/systemc/misc/communication/reslv/tvec4/golden/tvec4.log b/src/systemc/tests/systemc/misc/communication/reslv/tvec4/golden/tvec4.log new file mode 100644 index 000000000..323840809 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/tvec4/golden/tvec4.log @@ -0,0 +1,23 @@ +SystemC Simulation +Value on Bus = XXXXX +P1: Set to 1 +P2: Set to Z +Value on Bus = 11001 +P1: Set to Z +P2: Set to 0 +Value on Bus = 00110 +P1: Set to 1 +P2: Set to Z +Value on Bus = 11001 +P1: Set to Z +P2: Set to 0 +Value on Bus = 00110 +P1: Set to 1 +P2: Set to Z +Value on Bus = 11001 +P1: Set to Z +P2: Set to 0 +Value on Bus = 00110 +P1: Set to 1 +P2: Set to Z +Value on Bus = 11001 diff --git a/src/systemc/tests/systemc/misc/communication/reslv/tvec4/tvec4.cpp b/src/systemc/tests/systemc/misc/communication/reslv/tvec4/tvec4.cpp new file mode 100644 index 000000000..b66615baf --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/tvec4/tvec4.cpp @@ -0,0 +1,162 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tvec4.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +typedef sc_signal_rv<5> sc_signal_resolved_vector; + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_signal_resolved_vector& out; + sc_in<bool> in; + + proc1( sc_module_name n, + sc_signal_resolved_vector& OUT_, + sc_signal<bool>& IN_ ) + : out(OUT_) + { + in(IN_); + SC_THREAD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc1::entry() +{ + wait(); + sc_lv<5> a; + while (true) { + if ((bool) in == true) { + cout << "P1: Set to 1" << endl; + a = "11001"; out = a; + } + else { + cout << "P1: Set to Z" << endl; + a = "ZZZZZ"; out = a; + } + wait(); + } +} + + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_signal_resolved_vector& out; + sc_in<bool> in; + + proc2( sc_module_name n, + sc_signal_resolved_vector& OUT_, + sc_signal<bool>& IN_ ) + : out(OUT_) + { + in(IN_); + SC_THREAD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc2::entry() +{ + wait(); + sc_lv<5> a; + while (true) { + if ((bool) in == false) { + cout << "P2: Set to 0" << endl; + a = "00110"; out = a; + } + else { + cout << "P2: Set to Z" << endl; + a = "ZZZZZ"; out = a; + } + wait(); + } +} + +SC_MODULE( proc3 ) +{ + SC_HAS_PROCESS( proc3 ); + + const sc_signal_resolved_vector& in; + + proc3( sc_module_name n, + const sc_signal_resolved_vector& IN_ ) + : in(IN_) + { + SC_METHOD( entry ); + sensitive << in; + } + + void entry() + { + sc_lv<5> v; + v = in; + cout << "Value on Bus = " << v.to_string().c_str() << endl; + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_signal_resolved_vector Bus; + sc_signal<bool> clock; + + proc1 P1("P1", Bus, clock); + proc2 P2("P2", Bus, clock); + proc3 P3("P3", Bus); + + clock = 0; + sc_start(0, SC_NS); + clock = 1; + sc_start(10, SC_NS); + for (int i = 0; i < 3; i++) { + clock = 0; + sc_start(10, SC_NS); + clock = 1; + sc_start(10, SC_NS); + } + return 0; +} + |